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#[doc = "Reader of register AHB2ENR"] pub type R = crate::R<u32, super::AHB2ENR>; #[doc = "Writer for register AHB2ENR"] pub type W = crate::W<u32, super::AHB2ENR>; #[doc = "Register AHB2ENR `reset()`'s with value 0"] impl crate::ResetValue for super::AHB2ENR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `GPIOAEN`"] pub type GPIOAEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIOAEN`"] pub struct GPIOAEN_W<'a> { w: &'a mut W, } impl<'a> GPIOAEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `GPIOBEN`"] pub type GPIOBEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIOBEN`"] pub struct GPIOBEN_W<'a> { w: &'a mut W, } impl<'a> GPIOBEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `GPIOCEN`"] pub type GPIOCEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIOCEN`"] pub struct GPIOCEN_W<'a> { w: &'a mut W, } impl<'a> GPIOCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `GPIODEN`"] pub type GPIODEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIODEN`"] pub struct GPIODEN_W<'a> { w: &'a mut W, } impl<'a> GPIODEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `GPIOEEN`"] pub type GPIOEEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIOEEN`"] pub struct GPIOEEN_W<'a> { w: &'a mut W, } impl<'a> GPIOEEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `GPIOFEN`"] pub type GPIOFEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIOFEN`"] pub struct GPIOFEN_W<'a> { w: &'a mut W, } impl<'a> GPIOFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Reader of field `GPIOGEN`"] pub type GPIOGEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `GPIOGEN`"] pub struct GPIOGEN_W<'a> { w: &'a mut W, } impl<'a> GPIOGEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); self.w } } #[doc = "Reader of field `ADC12EN`"] pub type ADC12EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ADC12EN`"] pub struct ADC12EN_W<'a> { w: &'a mut W, } impl<'a> ADC12EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); self.w } } #[doc = "Reader of field `ADC345EN`"] pub type ADC345EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ADC345EN`"] pub struct ADC345EN_W<'a> { w: &'a mut W, } impl<'a> ADC345EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "Reader of field `DAC1EN`"] pub type DAC1EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DAC1EN`"] pub struct DAC1EN_W<'a> { w: &'a mut W, } impl<'a> DAC1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } #[doc = "Reader of field `DAC2EN`"] pub type DAC2EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DAC2EN`"] pub struct DAC2EN_W<'a> { w: &'a mut W, } impl<'a> DAC2EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Reader of field `DAC3EN`"] pub type DAC3EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DAC3EN`"] pub struct DAC3EN_W<'a> { w: &'a mut W, } impl<'a> DAC3EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "Reader of field `DAC4EN`"] pub type DAC4EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DAC4EN`"] pub struct DAC4EN_W<'a> { w: &'a mut W, } impl<'a> DAC4EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); self.w } } #[doc = "Reader of field `AESEN`"] pub type AESEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `AESEN`"] pub struct AESEN_W<'a> { w: &'a mut W, } impl<'a> AESEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); self.w } } #[doc = "Reader of field `RNGEN`"] pub type RNGEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `RNGEN`"] pub struct RNGEN_W<'a> { w: &'a mut W, } impl<'a> RNGEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); self.w } } impl R { #[doc = "Bit 0 - IO port A clock enable"] #[inline(always)] pub fn gpioaen(&self) -> GPIOAEN_R { GPIOAEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - IO port B clock enable"] #[inline(always)] pub fn gpioben(&self) -> GPIOBEN_R { GPIOBEN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - IO port C clock enable"] #[inline(always)] pub fn gpiocen(&self) -> GPIOCEN_R { GPIOCEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - IO port D clock enable"] #[inline(always)] pub fn gpioden(&self) -> GPIODEN_R { GPIODEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - IO port E clock enable"] #[inline(always)] pub fn gpioeen(&self) -> GPIOEEN_R { GPIOEEN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - IO port F clock enable"] #[inline(always)] pub fn gpiofen(&self) -> GPIOFEN_R { GPIOFEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - IO port G clock enable"] #[inline(always)] pub fn gpiogen(&self) -> GPIOGEN_R { GPIOGEN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 13 - ADC clock enable"] #[inline(always)] pub fn adc12en(&self) -> ADC12EN_R { ADC12EN_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - DCMI clock enable"] #[inline(always)] pub fn adc345en(&self) -> ADC345EN_R { ADC345EN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 16 - AES accelerator clock enable"] #[inline(always)] pub fn dac1en(&self) -> DAC1EN_R { DAC1EN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - HASH clock enable"] #[inline(always)] pub fn dac2en(&self) -> DAC2EN_R { DAC2EN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - Random Number Generator clock enable"] #[inline(always)] pub fn dac3en(&self) -> DAC3EN_R { DAC3EN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - DAC4 clock enable"] #[inline(always)] pub fn dac4en(&self) -> DAC4EN_R { DAC4EN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 24 - AES clock enable"] #[inline(always)] pub fn aesen(&self) -> AESEN_R { AESEN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 26 - Random Number Generator clock enable"] #[inline(always)] pub fn rngen(&self) -> RNGEN_R { RNGEN_R::new(((self.bits >> 26) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - IO port A clock enable"] #[inline(always)] pub fn gpioaen(&mut self) -> GPIOAEN_W { GPIOAEN_W { w: self } } #[doc = "Bit 1 - IO port B clock enable"] #[inline(always)] pub fn gpioben(&mut self) -> GPIOBEN_W { GPIOBEN_W { w: self } } #[doc = "Bit 2 - IO port C clock enable"] #[inline(always)] pub fn gpiocen(&mut self) -> GPIOCEN_W { GPIOCEN_W { w: self } } #[doc = "Bit 3 - IO port D clock enable"] #[inline(always)] pub fn gpioden(&mut self) -> GPIODEN_W { GPIODEN_W { w: self } } #[doc = "Bit 4 - IO port E clock enable"] #[inline(always)] pub fn gpioeen(&mut self) -> GPIOEEN_W { GPIOEEN_W { w: self } } #[doc = "Bit 5 - IO port F clock enable"] #[inline(always)] pub fn gpiofen(&mut self) -> GPIOFEN_W { GPIOFEN_W { w: self } } #[doc = "Bit 6 - IO port G clock enable"] #[inline(always)] pub fn gpiogen(&mut self) -> GPIOGEN_W { GPIOGEN_W { w: self } } #[doc = "Bit 13 - ADC clock enable"] #[inline(always)] pub fn adc12en(&mut self) -> ADC12EN_W { ADC12EN_W { w: self } } #[doc = "Bit 14 - DCMI clock enable"] #[inline(always)] pub fn adc345en(&mut self) -> ADC345EN_W { ADC345EN_W { w: self } } #[doc = "Bit 16 - AES accelerator clock enable"] #[inline(always)] pub fn dac1en(&mut self) -> DAC1EN_W { DAC1EN_W { w: self } } #[doc = "Bit 17 - HASH clock enable"] #[inline(always)] pub fn dac2en(&mut self) -> DAC2EN_W { DAC2EN_W { w: self } } #[doc = "Bit 18 - Random Number Generator clock enable"] #[inline(always)] pub fn dac3en(&mut self) -> DAC3EN_W { DAC3EN_W { w: self } } #[doc = "Bit 19 - DAC4 clock enable"] #[inline(always)] pub fn dac4en(&mut self) -> DAC4EN_W { DAC4EN_W { w: self } } #[doc = "Bit 24 - AES clock enable"] #[inline(always)] pub fn aesen(&mut self) -> AESEN_W { AESEN_W { w: self } } #[doc = "Bit 26 - Random Number Generator clock enable"] #[inline(always)] pub fn rngen(&mut self) -> RNGEN_W { RNGEN_W { w: self } } }