1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278
#[doc = "Reader of register CR"] pub type R = crate::R<u32, super::CR>; #[doc = "Writer for register CR"] pub type W = crate::W<u32, super::CR>; #[doc = "Register CR `reset()`'s with value 0x4000"] impl crate::ResetValue for super::CR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0x4000 } } #[doc = "Reader of field `SYNCOKIE`"] pub type SYNCOKIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SYNCOKIE`"] pub struct SYNCOKIE_W<'a> { w: &'a mut W, } impl<'a> SYNCOKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `SYNCWARNIE`"] pub type SYNCWARNIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SYNCWARNIE`"] pub struct SYNCWARNIE_W<'a> { w: &'a mut W, } impl<'a> SYNCWARNIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `ERRIE`"] pub type ERRIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ERRIE`"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `ESYNCIE`"] pub type ESYNCIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ESYNCIE`"] pub struct ESYNCIE_W<'a> { w: &'a mut W, } impl<'a> ESYNCIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `CEN`"] pub type CEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CEN`"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Reader of field `AUTOTRIMEN`"] pub type AUTOTRIMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `AUTOTRIMEN`"] pub struct AUTOTRIMEN_W<'a> { w: &'a mut W, } impl<'a> AUTOTRIMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); self.w } } #[doc = "Reader of field `SWSYNC`"] pub type SWSYNC_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SWSYNC`"] pub struct SWSYNC_W<'a> { w: &'a mut W, } impl<'a> SWSYNC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); self.w } } #[doc = "Reader of field `TRIM`"] pub type TRIM_R = crate::R<u8, u8>; #[doc = "Write proxy for field `TRIM`"] pub struct TRIM_W<'a> { w: &'a mut W, } impl<'a> TRIM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 8)) | (((value as u32) & 0x7f) << 8); self.w } } impl R { #[doc = "Bit 0 - SYNC event OK interrupt enable"] #[inline(always)] pub fn syncokie(&self) -> SYNCOKIE_R { SYNCOKIE_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - SYNC warning interrupt enable"] #[inline(always)] pub fn syncwarnie(&self) -> SYNCWARNIE_R { SYNCWARNIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Synchronization or trimming error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Expected SYNC interrupt enable"] #[inline(always)] pub fn esyncie(&self) -> ESYNCIE_R { ESYNCIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 5 - Frequency error counter enable This bit enables the oscillator clock for the frequency error counter. When this bit is set, the CRS_CFGR register is write-protected and cannot be modified."] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Automatic trimming enable This bit enables the automatic hardware adjustment of TRIM bits according to the measured frequency error between two SYNC events. If this bit is set, the TRIM bits are read-only. The TRIM value can be adjusted by hardware by one or two steps at a time, depending on the measured frequency error value. Refer to Section7.3.4: Frequency error evaluation and automatic trimming for more details."] #[inline(always)] pub fn autotrimen(&self) -> AUTOTRIMEN_R { AUTOTRIMEN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Generate software SYNC event This bit is set by software in order to generate a software SYNC event. It is automatically cleared by hardware."] #[inline(always)] pub fn swsync(&self) -> SWSYNC_R { SWSYNC_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 8:14 - HSI48 oscillator smooth trimming These bits provide a user-programmable trimming value to the HSI48 oscillator. They can be programmed to adjust to variations in voltage and temperature that influence the frequency of the HSI48. The default value is 32, which corresponds to the middle of the trimming interval. The trimming step is around 67 kHz between two consecutive TRIM steps. A higher TRIM value corresponds to a higher output frequency. When the AUTOTRIMEN bit is set, this field is controlled by hardware and is read-only."] #[inline(always)] pub fn trim(&self) -> TRIM_R { TRIM_R::new(((self.bits >> 8) & 0x7f) as u8) } } impl W { #[doc = "Bit 0 - SYNC event OK interrupt enable"] #[inline(always)] pub fn syncokie(&mut self) -> SYNCOKIE_W { SYNCOKIE_W { w: self } } #[doc = "Bit 1 - SYNC warning interrupt enable"] #[inline(always)] pub fn syncwarnie(&mut self) -> SYNCWARNIE_W { SYNCWARNIE_W { w: self } } #[doc = "Bit 2 - Synchronization or trimming error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bit 3 - Expected SYNC interrupt enable"] #[inline(always)] pub fn esyncie(&mut self) -> ESYNCIE_W { ESYNCIE_W { w: self } } #[doc = "Bit 5 - Frequency error counter enable This bit enables the oscillator clock for the frequency error counter. When this bit is set, the CRS_CFGR register is write-protected and cannot be modified."] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Bit 6 - Automatic trimming enable This bit enables the automatic hardware adjustment of TRIM bits according to the measured frequency error between two SYNC events. If this bit is set, the TRIM bits are read-only. The TRIM value can be adjusted by hardware by one or two steps at a time, depending on the measured frequency error value. Refer to Section7.3.4: Frequency error evaluation and automatic trimming for more details."] #[inline(always)] pub fn autotrimen(&mut self) -> AUTOTRIMEN_W { AUTOTRIMEN_W { w: self } } #[doc = "Bit 7 - Generate software SYNC event This bit is set by software in order to generate a software SYNC event. It is automatically cleared by hardware."] #[inline(always)] pub fn swsync(&mut self) -> SWSYNC_W { SWSYNC_W { w: self } } #[doc = "Bits 8:14 - HSI48 oscillator smooth trimming These bits provide a user-programmable trimming value to the HSI48 oscillator. They can be programmed to adjust to variations in voltage and temperature that influence the frequency of the HSI48. The default value is 32, which corresponds to the middle of the trimming interval. The trimming step is around 67 kHz between two consecutive TRIM steps. A higher TRIM value corresponds to a higher output frequency. When the AUTOTRIMEN bit is set, this field is controlled by hardware and is read-only."] #[inline(always)] pub fn trim(&mut self) -> TRIM_W { TRIM_W { w: self } } }