Module stm32g0::stm32g0c1::fdcan1::txefs

FDCAN Tx event FIFO status register

Structs

R

Register TXEFS reader

TXEFS_SPEC

FDCAN Tx event FIFO status register

Type Definitions

EFFL_R

Field EFFL reader - Event FIFO fill level Number of elements stored in Tx event FIFO, range 0 to 3.

EFF_R

Field EFF reader - Event FIFO full

EFGI_R

Field EFGI reader - Event FIFO get index Tx Event FIFO read index pointer, range 0 to 3.

EFPI_R

Field EFPI reader - Event FIFO put index Tx Event FIFO write index pointer, range 0 to 3.

TEFL_R

Field TEFL reader - Tx Event FIFO element lost This bit is a copy of interrupt flag IR[TEFL]. When IR[TEFL] is reset, this bit is also reset. 0 No Tx event FIFO element lost 1 Tx event FIFO element lost, also set after write attempt to Tx Event FIFO of size 0.