Module stm32g0::stm32g0c1::dmamux::rg0cr

source · [−]

Expand description

DMAMUX request generator channel x configuration register

Structs

R

Register RG0CR reader

RG0CR_SPEC

DMAMUX request generator channel x configuration register

W

Register RG0CR writer

Type Definitions

GE_R

Field GE reader - DMA request generator channel x enable

GE_W

Field GE writer - DMA request generator channel x enable

GNBREQ_R

Field GNBREQ reader - Number of DMA requests to be generated (minus 1) Defines the number of DMA requests to be generated after a trigger event. The actual number of generated DMA requests is GNBREQ +1. Note: This field shall only be written when GE bit is disabled.

GNBREQ_W

Field GNBREQ writer - Number of DMA requests to be generated (minus 1) Defines the number of DMA requests to be generated after a trigger event. The actual number of generated DMA requests is GNBREQ +1. Note: This field shall only be written when GE bit is disabled.

GPOL_R

Field GPOL reader - DMA request generator trigger polarity Defines the edge polarity of the selected trigger input

GPOL_W

Field GPOL writer - DMA request generator trigger polarity Defines the edge polarity of the selected trigger input

OIE_R

Field OIE reader - Trigger overrun interrupt enable

OIE_W

Field OIE writer - Trigger overrun interrupt enable

SIG_ID_R

Field SIG_ID reader - Signal identification Selects the DMA request trigger input used for the channel x of the DMA request generator

SIG_ID_W

Field SIG_ID writer - Signal identification Selects the DMA request trigger input used for the channel x of the DMA request generator