Expand description
Interrupt flag clear register
Structs
Type Definitions
Field CMCF writer - Character match clear flag Writing 1 to this bit clears the CMF flag in the USART_ISR register.
Field CTSCF writer - CTS clear flag Writing 1 to this bit clears the CTSIF flag in the USART_ISR register. Note: If the hardware flow control feature is not supported, this bit is reserved and must be kept at reset value. Refer to .
Field EOBCF writer - End of block clear flag Writing 1 to this bit clears the EOBF flag in the USART_ISR register. Note: If the USART does not support Smartcard mode, this bit is reserved and must be kept at reset value. Refer to .
Field FECF writer - Framing error clear flag Writing 1 to this bit clears the FE flag in the USART_ISR register.
Field IDLECF writer - Idle line detected clear flag Writing 1 to this bit clears the IDLE flag in the USART_ISR register.
Field LBDCF writer - LIN break detection clear flag Writing 1 to this bit clears the LBDF flag in the USART_ISR register. Note: If LIN mode is not supported, this bit is reserved and must be kept at reset value. Refer to .
Field NECF writer - Noise detected clear flag Writing 1 to this bit clears the NE flag in the USART_ISR register.
Field ORECF writer - Overrun error clear flag Writing 1 to this bit clears the ORE flag in the USART_ISR register.
Field PECF writer - Parity error clear flag Writing 1 to this bit clears the PE flag in the USART_ISR register.
Field RTOCF writer - Receiver timeout clear flag Writing 1 to this bit clears the RTOF flag in the USART_ISR register. Note: If the USART does not support the Receiver timeout feature, this bit is reserved and must be kept at reset value. Refer to page 835.
Field TCBGTCF writer - Transmission complete before Guard time clear flag Writing 1 to this bit clears the TCBGT flag in the USART_ISR register.
Field TCCF writer - Transmission complete clear flag Writing 1 to this bit clears the TC flag in the USART_ISR register.
Field TXFECF writer - TXFIFO empty clear flag Writing 1 to this bit clears the TXFE flag in the USART_ISR register.
Field UDRCF writer - SPI slave underrun clear flag Writing 1 to this bit clears the UDRF flag in the USART_ISR register. Note: If the USART does not support SPI slave mode, this bit is reserved and must be kept at reset value. Refer to
Field WUCF writer - Wakeup from low-power mode clear flag Writing 1 to this bit clears the WUF flag in the USART_ISR register. Note: If the USART does not support the wakeup from Stop feature, this bit is reserved and must be kept at reset value. Refer to page 835.