Module stm32g0::stm32g0b0::dma2::ch

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Expand description

Register block Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers

Modules

cr

DMA channel 1 configuration register

mar

DMA channel 1 memory address

ndtr

DMA channel 1 number of data tegister

par

DMA channel 1 peripheral address

Type Definitions

CR

CR register accessor: an alias for Reg<CR_SPEC>

MAR

MAR register accessor: an alias for Reg<MAR_SPEC>

NDTR

NDTR register accessor: an alias for Reg<NDTR_SPEC>

PAR

PAR register accessor: an alias for Reg<PAR_SPEC>