Module stm32g0::stm32g081::lpuart

source · [−]
Expand description

Universal synchronous asynchronous receiver transmitter

Modules

brr

Baud rate register

cr1

Control register 1

cr2

Control register 2

cr3

Control register 3

hwcfgr1

LPUART Hardware Configuration register 1

hwcfgr2

LPUART Hardware Configuration register 2

icr

Interrupt flag clear register

ipidr

EXTI Identification register

isr

Interrupt & status register

presc

Prescaler register

rdr

Receive data register

rqr

Request register

sidr

EXTI Size ID register

tdr

Transmit data register

verr

EXTI IP Version register

Structs

RegisterBlock

Register block

Type Definitions

BRR

BRR register accessor: an alias for Reg<BRR_SPEC>

CR1

CR1 register accessor: an alias for Reg<CR1_SPEC>

CR2

CR2 register accessor: an alias for Reg<CR2_SPEC>

CR3

CR3 register accessor: an alias for Reg<CR3_SPEC>

HWCFGR1

HWCFGR1 register accessor: an alias for Reg<HWCFGR1_SPEC>

HWCFGR2

HWCFGR2 register accessor: an alias for Reg<HWCFGR2_SPEC>

ICR

ICR register accessor: an alias for Reg<ICR_SPEC>

IPIDR

IPIDR register accessor: an alias for Reg<IPIDR_SPEC>

ISR

ISR register accessor: an alias for Reg<ISR_SPEC>

PRESC

PRESC register accessor: an alias for Reg<PRESC_SPEC>

RDR

RDR register accessor: an alias for Reg<RDR_SPEC>

RQR

RQR register accessor: an alias for Reg<RQR_SPEC>

SIDR

SIDR register accessor: an alias for Reg<SIDR_SPEC>

TDR

TDR register accessor: an alias for Reg<TDR_SPEC>

VERR

VERR register accessor: an alias for Reg<VERR_SPEC>