Module stm32g0::stm32g070::rcc::pllsyscfgr

PLL configuration register

Structs

PLLSYSCFGR_SPEC

PLL configuration register

R

Register PLLSYSCFGR reader

W

Register PLLSYSCFGR writer

Type Definitions

PLLM_R

Field PLLM reader - Division factor M of the PLL input clock divider

PLLM_W

Field PLLM writer - Division factor M of the PLL input clock divider

PLLN_R

Field PLLN reader - PLL frequency multiplication factor N

PLLN_W

Field PLLN writer - PLL frequency multiplication factor N

PLLPEN_R

Field PLLPEN reader - PLLPCLK clock output enable

PLLPEN_W

Field PLLPEN writer - PLLPCLK clock output enable

PLLP_R

Field PLLP reader - PLL VCO division factor P for PLLPCLK clock output

PLLP_W

Field PLLP writer - PLL VCO division factor P for PLLPCLK clock output

PLLQEN_R

Field PLLQEN reader - PLLQCLK clock output enable

PLLQEN_W

Field PLLQEN writer - PLLQCLK clock output enable

PLLQ_R

Field PLLQ reader - PLL VCO division factor Q for PLLQCLK clock output

PLLQ_W

Field PLLQ writer - PLL VCO division factor Q for PLLQCLK clock output

PLLREN_R

Field PLLREN reader - PLLRCLK clock output enable

PLLREN_W

Field PLLREN writer - PLLRCLK clock output enable

PLLR_R

Field PLLR reader - PLL VCO division factor R for PLLRCLK clock output

PLLR_W

Field PLLR writer - PLL VCO division factor R for PLLRCLK clock output

PLLSRC_R

Field PLLSRC reader - PLL input clock source

PLLSRC_W

Field PLLSRC writer - PLL input clock source