stm32g0/stm32g0c1/dmamux/
rgsr.rs

1///Register `RGSR` reader
2pub type R = crate::R<RGSRrs>;
3/**Generator Overrun Flag %s
4
5Value on reset: 0*/
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum OF0 {
9    ///0: No new trigger event occured on DMA request generator channel x, before the request counter underrun
10    NoTrigger = 0,
11    ///1: New trigger event occured on DMA request generator channel x, before the request counter underrun
12    Trigger = 1,
13}
14impl From<OF0> for bool {
15    #[inline(always)]
16    fn from(variant: OF0) -> Self {
17        variant as u8 != 0
18    }
19}
20///Field `OF(0-3)` reader - Generator Overrun Flag %s
21pub type OF_R = crate::BitReader<OF0>;
22impl OF_R {
23    ///Get enumerated values variant
24    #[inline(always)]
25    pub const fn variant(&self) -> OF0 {
26        match self.bits {
27            false => OF0::NoTrigger,
28            true => OF0::Trigger,
29        }
30    }
31    ///No new trigger event occured on DMA request generator channel x, before the request counter underrun
32    #[inline(always)]
33    pub fn is_no_trigger(&self) -> bool {
34        *self == OF0::NoTrigger
35    }
36    ///New trigger event occured on DMA request generator channel x, before the request counter underrun
37    #[inline(always)]
38    pub fn is_trigger(&self) -> bool {
39        *self == OF0::Trigger
40    }
41}
42impl R {
43    ///Generator Overrun Flag (0-3)
44    ///
45    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `OF0` field.</div>
46    #[inline(always)]
47    pub fn of(&self, n: u8) -> OF_R {
48        #[allow(clippy::no_effect)]
49        [(); 4][n as usize];
50        OF_R::new(((self.bits >> n) & 1) != 0)
51    }
52    ///Iterator for array of:
53    ///Generator Overrun Flag (0-3)
54    #[inline(always)]
55    pub fn of_iter(&self) -> impl Iterator<Item = OF_R> + '_ {
56        (0..4).map(move |n| OF_R::new(((self.bits >> n) & 1) != 0))
57    }
58    ///Bit 0 - Generator Overrun Flag 0
59    #[inline(always)]
60    pub fn of0(&self) -> OF_R {
61        OF_R::new((self.bits & 1) != 0)
62    }
63    ///Bit 1 - Generator Overrun Flag 1
64    #[inline(always)]
65    pub fn of1(&self) -> OF_R {
66        OF_R::new(((self.bits >> 1) & 1) != 0)
67    }
68    ///Bit 2 - Generator Overrun Flag 2
69    #[inline(always)]
70    pub fn of2(&self) -> OF_R {
71        OF_R::new(((self.bits >> 2) & 1) != 0)
72    }
73    ///Bit 3 - Generator Overrun Flag 3
74    #[inline(always)]
75    pub fn of3(&self) -> OF_R {
76        OF_R::new(((self.bits >> 3) & 1) != 0)
77    }
78}
79impl core::fmt::Debug for R {
80    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
81        f.debug_struct("RGSR")
82            .field("of0", &self.of0())
83            .field("of1", &self.of1())
84            .field("of2", &self.of2())
85            .field("of3", &self.of3())
86            .finish()
87    }
88}
89/**DMAMUX request generator interrupt status register
90
91You can [`read`](crate::Reg::read) this register and get [`rgsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
92
93See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#DMAMUX:RGSR)*/
94pub struct RGSRrs;
95impl crate::RegisterSpec for RGSRrs {
96    type Ux = u32;
97}
98///`read()` method returns [`rgsr::R`](R) reader structure
99impl crate::Readable for RGSRrs {}
100///`reset()` method sets RGSR to value 0
101impl crate::Resettable for RGSRrs {}
stm32g0/stm32g0c1/dmamux/rgsr.rs

stm32g0/stm32g0c1/dmamux/
rgsr.rs
