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#[doc = r" Value read from the register"] pub struct R { bits: u32, } impl super::DMAMUX_HWCFGR1 { #[doc = r" Reads the contents of the register"] #[inline] pub fn read(&self) -> R { R { bits: self.register.get(), } } } #[doc = r" Value of the field"] pub struct NUM_DMA_STREAMSR { bits: u8, } impl NUM_DMA_STREAMSR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bits(&self) -> u8 { self.bits } } #[doc = r" Value of the field"] pub struct NUM_DMA_PERIPH_REQR { bits: u8, } impl NUM_DMA_PERIPH_REQR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bits(&self) -> u8 { self.bits } } #[doc = r" Value of the field"] pub struct NUM_DMA_TRIGR { bits: u8, } impl NUM_DMA_TRIGR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bits(&self) -> u8 { self.bits } } #[doc = r" Value of the field"] pub struct NUM_DMA_REQGENR { bits: u8, } impl NUM_DMA_REQGENR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bits(&self) -> u8 { self.bits } } impl R { #[doc = r" Value of the register as raw bits"] #[inline] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bits 0:7 - number of DMA request line multiplexer (output) channels"] #[inline] pub fn num_dma_streams(&self) -> NUM_DMA_STREAMSR { let bits = { const MASK: u8 = 255; const OFFSET: u8 = 0; ((self.bits >> OFFSET) & MASK as u32) as u8 }; NUM_DMA_STREAMSR { bits } } #[doc = "Bits 8:15 - number of DMA request lines from peripherals"] #[inline] pub fn num_dma_periph_req(&self) -> NUM_DMA_PERIPH_REQR { let bits = { const MASK: u8 = 255; const OFFSET: u8 = 8; ((self.bits >> OFFSET) & MASK as u32) as u8 }; NUM_DMA_PERIPH_REQR { bits } } #[doc = "Bits 16:23 - number of synchronization inputs"] #[inline] pub fn num_dma_trig(&self) -> NUM_DMA_TRIGR { let bits = { const MASK: u8 = 255; const OFFSET: u8 = 16; ((self.bits >> OFFSET) & MASK as u32) as u8 }; NUM_DMA_TRIGR { bits } } #[doc = "Bits 24:31 - number of DMA request generator channels"] #[inline] pub fn num_dma_reqgen(&self) -> NUM_DMA_REQGENR { let bits = { const MASK: u8 = 255; const OFFSET: u8 = 24; ((self.bits >> OFFSET) & MASK as u32) as u8 }; NUM_DMA_REQGENR { bits } } }