Module stm32g0::stm32g0c1::dmamux::dmamux_rg3cr[][src]

Expand description

DMAMUX request generator channel x configuration register

Structs

DMAMUX request generator channel x configuration register

Field GE reader - DMA request generator channel x enable

Field GE writer - DMA request generator channel x enable

Field GNBREQ reader - Number of DMA requests to be generated (minus 1) Defines the number of DMA requests to be generated after a trigger event. The actual number of generated DMA requests is GNBREQ +1. Note: This field shall only be written when GE bit is disabled.

Field GNBREQ writer - Number of DMA requests to be generated (minus 1) Defines the number of DMA requests to be generated after a trigger event. The actual number of generated DMA requests is GNBREQ +1. Note: This field shall only be written when GE bit is disabled.

Field GPOL reader - DMA request generator trigger polarity Defines the edge polarity of the selected trigger input

Field GPOL writer - DMA request generator trigger polarity Defines the edge polarity of the selected trigger input

Field OIE reader - Trigger overrun interrupt enable

Field OIE writer - Trigger overrun interrupt enable

Register DMAMUX_RG3CR reader

Field SIG_ID reader - Signal identification Selects the DMA request trigger input used for the channel x of the DMA request generator

Field SIG_ID writer - Signal identification Selects the DMA request trigger input used for the channel x of the DMA request generator

Register DMAMUX_RG3CR writer

Enums

DMA request generator channel x enable

DMA request generator trigger polarity Defines the edge polarity of the selected trigger input

Trigger overrun interrupt enable