Module stm32g0::stm32g030::dma::ifcr[−][src]

Expand description

DMA interrupt flag clear register

Structs

CGIF1_W

Field CGIF1 writer - Clear channel 1 global interrupt flag

CGIF2_W

Field CGIF2 writer - Clear channel 2 global interrupt flag

CGIF3_W

Field CGIF3 writer - Clear channel 3 global interrupt flag

CGIF4_W

Field CGIF4 writer - Clear channel 4 global interrupt flag

CGIF5_W

Field CGIF5 writer - Clear channel 5 global interrupt flag

CHTIF1_W

Field CHTIF1 writer - Clear channel 1 half transfer flag

CHTIF2_W

Field CHTIF2 writer - Clear channel 2 half transfer flag

CHTIF3_W

Field CHTIF3 writer - Clear channel 3 half transfer flag

CHTIF4_W

Field CHTIF4 writer - Clear channel 4 half transfer flag

CHTIF5_W

Field CHTIF5 writer - Clear channel 5 half transfer flag

CTCIF1_W

Field CTCIF1 writer - Clear channel 1 transfer complete flag

CTCIF2_W

Field CTCIF2 writer - Clear channel 2 transfer complete flag

CTCIF3_W

Field CTCIF3 writer - Clear channel 3 transfer complete flag

CTCIF4_W

Field CTCIF4 writer - Clear channel 4 transfer complete flag

CTCIF5_W

Field CTCIF5 writer - Clear channel 5 transfer complete flag

CTEIF1_W

Field CTEIF1 writer - Clear channel 1 transfer error flag

CTEIF2_W

Field CTEIF2 writer - Clear channel 2 transfer error flag

CTEIF3_W

Field CTEIF3 writer - Clear channel 3 transfer error flag

CTEIF4_W

Field CTEIF4 writer - Clear channel 4 transfer error flag

CTEIF5_W

Field CTEIF5 writer - Clear channel 5 transfer error flag

IFCR_SPEC

DMA interrupt flag clear register

W

Register IFCR writer