Module stm32f7::stm32f7x3::rcc::dckcfgr1 [−][src]
dedicated clocks configuration register
Structs
| PLLI2SDIVQ_W | Write proxy for field |
| PLLSAIDIVQ_W | Write proxy for field |
| SAI1SEL_W | Write proxy for field |
| SAI2SEL_W | Write proxy for field |
| TIMPRE_W | Write proxy for field |
Enums
| PLLI2SDIVQ_A | PLLI2S division factor for SAI1 clock |
| PLLSAIDIVQ_A | PLLSAI division factor for SAI1 clock |
| SAI1SEL_A | SAI1 clock source selection |
| SAI2SEL_A | SAI2 clock source selection |
| TIMPRE_A | Timers clocks prescalers selection |
Type Definitions
| PLLI2SDIVQ_R | Reader of field |
| PLLSAIDIVQ_R | Reader of field |
| R | Reader of register DCKCFGR1 |
| SAI1SEL_R | Reader of field |
| SAI2SEL_R | Reader of field |
| TIMPRE_R | Reader of field |
| W | Writer for register DCKCFGR1 |