Expand description
status register
Structs
Field CCRCFAIL reader - Command response received (CRC check failed)
Field CEATAEND reader - CE-ATA command completion signal received for CMD61
Field CMDACT reader - Command transfer in progress
Field CMDREND reader - Command response received (CRC check passed)
Field CMDSENT reader - Command sent (no response required)
Field CTIMEOUT reader - Command response timeout
Field DATAEND reader - Data end (data counter, SDIDCOUNT, is zero)
Field DBCKEND reader - Data block sent/received (CRC check passed)
Field DCRCFAIL reader - Data block sent/received (CRC check failed)
Field DTIMEOUT reader - Data timeout
Register STA reader
Field RXACT reader - Data receive in progress
Field RXDAVL reader - Data available in receive FIFO
Field RXFIFOE reader - Receive FIFO empty
Field RXFIFOF reader - Receive FIFO full
Field RXFIFOHF reader - Receive FIFO half full: there are at least 8 words in the FIFO
Field RXOVERR reader - Received FIFO overrun error
Field SDIOIT reader - SDIO interrupt received
status register
Field STBITERR reader - Start bit not detected on all data signals in wide bus mode
Field TXACT reader - Data transmit in progress
Field TXDAVL reader - Data available in transmit FIFO
Field TXFIFOE reader - Transmit FIFO empty
Field TXFIFOF reader - Transmit FIFO full
Field TXFIFOHE reader - Transmit FIFO half empty: at least 8 words can be written into the FIFO
Field TXUNDERR reader - Transmit FIFO underrun error
Enums
Command response received (CRC check failed)
CE-ATA command completion signal received for CMD61
Command transfer in progress
Command response received (CRC check passed)
Command sent (no response required)
Command response timeout
Data end (data counter, SDIDCOUNT, is zero)
Data block sent/received (CRC check passed)
Data block sent/received (CRC check failed)
Data timeout
Data receive in progress
Data available in receive FIFO
Receive FIFO empty
Receive FIFO full
Receive FIFO half full: there are at least 8 words in the FIFO
Received FIFO overrun error
SDIO interrupt received
Start bit not detected on all data signals in wide bus mode
Data transmit in progress
Data available in transmit FIFO
Transmit FIFO empty
Transmit FIFO full
Transmit FIFO half empty: at least 8 words can be written into the FIFO
Transmit FIFO underrun error