Struct stm32f4xx_hal::pac::adc_common::ccr::MULTI_W

pub struct MULTI_W<'a> { /* fields omitted */ }

Write proxy for field MULTI

Implementations

impl<'a> MULTI_W<'a>

pub fn variant(self, variant: MULTI_A) -> &'a mut W<u32, Reg<u32, _CCR>>

Writes variant to the field

pub fn independent(self) -> &'a mut W<u32, Reg<u32, _CCR>>

All the ADCs independent: independent mode

pub fn dual_rj(self) -> &'a mut W<u32, Reg<u32, _CCR>>

Dual ADC1 and ADC2, combined regular and injected simultaneous mode

pub fn dual_ra(self) -> &'a mut W<u32, Reg<u32, _CCR>>

Dual ADC1 and ADC2, combined regular and alternate trigger mode

pub fn dual_j(self) -> &'a mut W<u32, Reg<u32, _CCR>>

Dual ADC1 and ADC2, injected simultaneous mode only

pub fn dual_r(self) -> &'a mut W<u32, Reg<u32, _CCR>>

Dual ADC1 and ADC2, regular simultaneous mode only

pub fn dual_i(self) -> &'a mut W<u32, Reg<u32, _CCR>>

Dual ADC1 and ADC2, interleaved mode only

pub fn dual_a(self) -> &'a mut W<u32, Reg<u32, _CCR>>

Dual ADC1 and ADC2, alternate trigger mode only

pub fn triple_rj(self) -> &'a mut W<u32, Reg<u32, _CCR>>

Triple ADC, regular and injected simultaneous mode

pub fn triple_ra(self) -> &'a mut W<u32, Reg<u32, _CCR>>

Triple ADC, regular and alternate trigger mode

pub fn triple_j(self) -> &'a mut W<u32, Reg<u32, _CCR>>

Triple ADC, injected simultaneous mode only

pub fn triple_r(self) -> &'a mut W<u32, Reg<u32, _CCR>>

Triple ADC, regular simultaneous mode only

pub fn triple_i(self) -> &'a mut W<u32, Reg<u32, _CCR>>

Triple ADC, interleaved mode only

pub fn triple_a(self) -> &'a mut W<u32, Reg<u32, _CCR>>

Triple ADC, alternate trigger mode only

pub unsafe fn bits(self, value: u8) -> &'a mut W<u32, Reg<u32, _CCR>>

Writes raw bits to the field