Module stm32f439::otg_hs_host [] [src]

USB on the go high speed

Modules

otg_hs_haint

OTG_HS Host all channels interrupt register

otg_hs_haintmsk

OTG_HS host all channels interrupt mask register

otg_hs_hcchar0

OTG_HS host channel-0 characteristics register

otg_hs_hcchar1

OTG_HS host channel-1 characteristics register

otg_hs_hcchar2

OTG_HS host channel-2 characteristics register

otg_hs_hcchar3

OTG_HS host channel-3 characteristics register

otg_hs_hcchar4

OTG_HS host channel-4 characteristics register

otg_hs_hcchar5

OTG_HS host channel-5 characteristics register

otg_hs_hcchar6

OTG_HS host channel-6 characteristics register

otg_hs_hcchar7

OTG_HS host channel-7 characteristics register

otg_hs_hcchar8

OTG_HS host channel-8 characteristics register

otg_hs_hcchar9

OTG_HS host channel-9 characteristics register

otg_hs_hcchar10

OTG_HS host channel-10 characteristics register

otg_hs_hcchar11

OTG_HS host channel-11 characteristics register

otg_hs_hcdma0

OTG_HS host channel-0 DMA address register

otg_hs_hcdma1

OTG_HS host channel-1 DMA address register

otg_hs_hcdma2

OTG_HS host channel-2 DMA address register

otg_hs_hcdma3

OTG_HS host channel-3 DMA address register

otg_hs_hcdma4

OTG_HS host channel-4 DMA address register

otg_hs_hcdma5

OTG_HS host channel-5 DMA address register

otg_hs_hcdma6

OTG_HS host channel-6 DMA address register

otg_hs_hcdma7

OTG_HS host channel-7 DMA address register

otg_hs_hcdma8

OTG_HS host channel-8 DMA address register

otg_hs_hcdma9

OTG_HS host channel-9 DMA address register

otg_hs_hcdma10

OTG_HS host channel-10 DMA address register

otg_hs_hcdma11

OTG_HS host channel-11 DMA address register

otg_hs_hcfg

OTG_HS host configuration register

otg_hs_hcint0

OTG_HS host channel-11 interrupt register

otg_hs_hcint1

OTG_HS host channel-1 interrupt register

otg_hs_hcint2

OTG_HS host channel-2 interrupt register

otg_hs_hcint3

OTG_HS host channel-3 interrupt register

otg_hs_hcint4

OTG_HS host channel-4 interrupt register

otg_hs_hcint5

OTG_HS host channel-5 interrupt register

otg_hs_hcint6

OTG_HS host channel-6 interrupt register

otg_hs_hcint7

OTG_HS host channel-7 interrupt register

otg_hs_hcint8

OTG_HS host channel-8 interrupt register

otg_hs_hcint9

OTG_HS host channel-9 interrupt register

otg_hs_hcint10

OTG_HS host channel-10 interrupt register

otg_hs_hcint11

OTG_HS host channel-11 interrupt register

otg_hs_hcintmsk0

OTG_HS host channel-11 interrupt mask register

otg_hs_hcintmsk1

OTG_HS host channel-1 interrupt mask register

otg_hs_hcintmsk2

OTG_HS host channel-2 interrupt mask register

otg_hs_hcintmsk3

OTG_HS host channel-3 interrupt mask register

otg_hs_hcintmsk4

OTG_HS host channel-4 interrupt mask register

otg_hs_hcintmsk5

OTG_HS host channel-5 interrupt mask register

otg_hs_hcintmsk6

OTG_HS host channel-6 interrupt mask register

otg_hs_hcintmsk7

OTG_HS host channel-7 interrupt mask register

otg_hs_hcintmsk8

OTG_HS host channel-8 interrupt mask register

otg_hs_hcintmsk9

OTG_HS host channel-9 interrupt mask register

otg_hs_hcintmsk10

OTG_HS host channel-10 interrupt mask register

otg_hs_hcintmsk11

OTG_HS host channel-11 interrupt mask register

otg_hs_hcsplt0

OTG_HS host channel-0 split control register

otg_hs_hcsplt1

OTG_HS host channel-1 split control register

otg_hs_hcsplt2

OTG_HS host channel-2 split control register

otg_hs_hcsplt3

OTG_HS host channel-3 split control register

otg_hs_hcsplt4

OTG_HS host channel-4 split control register

otg_hs_hcsplt5

OTG_HS host channel-5 split control register

otg_hs_hcsplt6

OTG_HS host channel-6 split control register

otg_hs_hcsplt7

OTG_HS host channel-7 split control register

otg_hs_hcsplt8

OTG_HS host channel-8 split control register

otg_hs_hcsplt9

OTG_HS host channel-9 split control register

otg_hs_hcsplt10

OTG_HS host channel-10 split control register

otg_hs_hcsplt11

OTG_HS host channel-11 split control register

otg_hs_hctsiz0

OTG_HS host channel-11 transfer size register

otg_hs_hctsiz1

OTG_HS host channel-1 transfer size register

otg_hs_hctsiz2

OTG_HS host channel-2 transfer size register

otg_hs_hctsiz3

OTG_HS host channel-3 transfer size register

otg_hs_hctsiz4

OTG_HS host channel-4 transfer size register

otg_hs_hctsiz5

OTG_HS host channel-5 transfer size register

otg_hs_hctsiz6

OTG_HS host channel-6 transfer size register

otg_hs_hctsiz7

OTG_HS host channel-7 transfer size register

otg_hs_hctsiz8

OTG_HS host channel-8 transfer size register

otg_hs_hctsiz9

OTG_HS host channel-9 transfer size register

otg_hs_hctsiz10

OTG_HS host channel-10 transfer size register

otg_hs_hctsiz11

OTG_HS host channel-11 transfer size register

otg_hs_hfir

OTG_HS Host frame interval register

otg_hs_hfnum

OTG_HS host frame number/frame time remaining register

otg_hs_hprt

OTG_HS host port control and status register

otg_hs_hptxsts

OTG_HS_Host periodic transmit FIFO/queue status register

Structs

OTG_HS_HAINT

OTG_HS Host all channels interrupt register

OTG_HS_HAINTMSK

OTG_HS host all channels interrupt mask register

OTG_HS_HCCHAR0

OTG_HS host channel-0 characteristics register

OTG_HS_HCCHAR1

OTG_HS host channel-1 characteristics register

OTG_HS_HCCHAR2

OTG_HS host channel-2 characteristics register

OTG_HS_HCCHAR3

OTG_HS host channel-3 characteristics register

OTG_HS_HCCHAR4

OTG_HS host channel-4 characteristics register

OTG_HS_HCCHAR5

OTG_HS host channel-5 characteristics register

OTG_HS_HCCHAR6

OTG_HS host channel-6 characteristics register

OTG_HS_HCCHAR7

OTG_HS host channel-7 characteristics register

OTG_HS_HCCHAR8

OTG_HS host channel-8 characteristics register

OTG_HS_HCCHAR9

OTG_HS host channel-9 characteristics register

OTG_HS_HCCHAR10

OTG_HS host channel-10 characteristics register

OTG_HS_HCCHAR11

OTG_HS host channel-11 characteristics register

OTG_HS_HCDMA0

OTG_HS host channel-0 DMA address register

OTG_HS_HCDMA1

OTG_HS host channel-1 DMA address register

OTG_HS_HCDMA2

OTG_HS host channel-2 DMA address register

OTG_HS_HCDMA3

OTG_HS host channel-3 DMA address register

OTG_HS_HCDMA4

OTG_HS host channel-4 DMA address register

OTG_HS_HCDMA5

OTG_HS host channel-5 DMA address register

OTG_HS_HCDMA6

OTG_HS host channel-6 DMA address register

OTG_HS_HCDMA7

OTG_HS host channel-7 DMA address register

OTG_HS_HCDMA8

OTG_HS host channel-8 DMA address register

OTG_HS_HCDMA9

OTG_HS host channel-9 DMA address register

OTG_HS_HCDMA10

OTG_HS host channel-10 DMA address register

OTG_HS_HCDMA11

OTG_HS host channel-11 DMA address register

OTG_HS_HCFG

OTG_HS host configuration register

OTG_HS_HCINT0

OTG_HS host channel-11 interrupt register

OTG_HS_HCINT1

OTG_HS host channel-1 interrupt register

OTG_HS_HCINT2

OTG_HS host channel-2 interrupt register

OTG_HS_HCINT3

OTG_HS host channel-3 interrupt register

OTG_HS_HCINT4

OTG_HS host channel-4 interrupt register

OTG_HS_HCINT5

OTG_HS host channel-5 interrupt register

OTG_HS_HCINT6

OTG_HS host channel-6 interrupt register

OTG_HS_HCINT7

OTG_HS host channel-7 interrupt register

OTG_HS_HCINT8

OTG_HS host channel-8 interrupt register

OTG_HS_HCINT9

OTG_HS host channel-9 interrupt register

OTG_HS_HCINT10

OTG_HS host channel-10 interrupt register

OTG_HS_HCINT11

OTG_HS host channel-11 interrupt register

OTG_HS_HCINTMSK0

OTG_HS host channel-11 interrupt mask register

OTG_HS_HCINTMSK1

OTG_HS host channel-1 interrupt mask register

OTG_HS_HCINTMSK2

OTG_HS host channel-2 interrupt mask register

OTG_HS_HCINTMSK3

OTG_HS host channel-3 interrupt mask register

OTG_HS_HCINTMSK4

OTG_HS host channel-4 interrupt mask register

OTG_HS_HCINTMSK5

OTG_HS host channel-5 interrupt mask register

OTG_HS_HCINTMSK6

OTG_HS host channel-6 interrupt mask register

OTG_HS_HCINTMSK7

OTG_HS host channel-7 interrupt mask register

OTG_HS_HCINTMSK8

OTG_HS host channel-8 interrupt mask register

OTG_HS_HCINTMSK9

OTG_HS host channel-9 interrupt mask register

OTG_HS_HCINTMSK10

OTG_HS host channel-10 interrupt mask register

OTG_HS_HCINTMSK11

OTG_HS host channel-11 interrupt mask register

OTG_HS_HCSPLT0

OTG_HS host channel-0 split control register

OTG_HS_HCSPLT1

OTG_HS host channel-1 split control register

OTG_HS_HCSPLT2

OTG_HS host channel-2 split control register

OTG_HS_HCSPLT3

OTG_HS host channel-3 split control register

OTG_HS_HCSPLT4

OTG_HS host channel-4 split control register

OTG_HS_HCSPLT5

OTG_HS host channel-5 split control register

OTG_HS_HCSPLT6

OTG_HS host channel-6 split control register

OTG_HS_HCSPLT7

OTG_HS host channel-7 split control register

OTG_HS_HCSPLT8

OTG_HS host channel-8 split control register

OTG_HS_HCSPLT9

OTG_HS host channel-9 split control register

OTG_HS_HCSPLT10

OTG_HS host channel-10 split control register

OTG_HS_HCSPLT11

OTG_HS host channel-11 split control register

OTG_HS_HCTSIZ0

OTG_HS host channel-11 transfer size register

OTG_HS_HCTSIZ1

OTG_HS host channel-1 transfer size register

OTG_HS_HCTSIZ2

OTG_HS host channel-2 transfer size register

OTG_HS_HCTSIZ3

OTG_HS host channel-3 transfer size register

OTG_HS_HCTSIZ4

OTG_HS host channel-4 transfer size register

OTG_HS_HCTSIZ5

OTG_HS host channel-5 transfer size register

OTG_HS_HCTSIZ6

OTG_HS host channel-6 transfer size register

OTG_HS_HCTSIZ7

OTG_HS host channel-7 transfer size register

OTG_HS_HCTSIZ8

OTG_HS host channel-8 transfer size register

OTG_HS_HCTSIZ9

OTG_HS host channel-9 transfer size register

OTG_HS_HCTSIZ10

OTG_HS host channel-10 transfer size register

OTG_HS_HCTSIZ11

OTG_HS host channel-11 transfer size register

OTG_HS_HFIR

OTG_HS Host frame interval register

OTG_HS_HFNUM

OTG_HS host frame number/frame time remaining register

OTG_HS_HPRT

OTG_HS host port control and status register

OTG_HS_HPTXSTS

OTG_HS_Host periodic transmit FIFO/queue status register

RegisterBlock

Register block