Module stm32f407g_disc::dac [−]
Digital-to-analog converter
Modules
| cr | control register |
| dhr8r1 | channel1 8-bit right aligned data holding register |
| dhr8r2 | channel2 8-bit right-aligned data holding register |
| dhr8rd | DUAL DAC 8-bit right aligned data holding register |
| dhr12l1 | channel1 12-bit left aligned data holding register |
| dhr12l2 | channel2 12-bit left aligned data holding register |
| dhr12ld | DUAL DAC 12-bit left aligned data holding register |
| dhr12r1 | channel1 12-bit right-aligned data holding register |
| dhr12r2 | channel2 12-bit right aligned data holding register |
| dhr12rd | Dual DAC 12-bit right-aligned data holding register |
| dor1 | channel1 data output register |
| dor2 | channel2 data output register |
| sr | status register |
| swtrigr | software trigger register |
Structs
| RegisterBlock | Register block |
Type Definitions
| CR | control register |
| DHR8R1 | channel1 8-bit right aligned data holding register |
| DHR8R2 | channel2 8-bit right-aligned data holding register |
| DHR8RD | DUAL DAC 8-bit right aligned data holding register |
| DHR12L1 | channel1 12-bit left aligned data holding register |
| DHR12L2 | channel2 12-bit left aligned data holding register |
| DHR12LD | DUAL DAC 12-bit left aligned data holding register |
| DHR12R1 | channel1 12-bit right-aligned data holding register |
| DHR12R2 | channel2 12-bit right aligned data holding register |
| DHR12RD | Dual DAC 12-bit right-aligned data holding register |
| DOR1 | channel1 data output register |
| DOR2 | channel2 data output register |
| SR | status register |
| SWTRIGR | software trigger register |