Enum stm32f407g_disc::tim2::cr2::MMSR
pub enum MMSR {
RESET,
ENABLE,
UPDATE,
COMPAREPULSE,
COMPAREOC1,
COMPAREOC2,
COMPAREOC3,
COMPAREOC4,
}
Expand description
Possible values of the field MMS
Variants§
RESET
The UG bit from the TIMx_EGR register is used as trigger output
ENABLE
The counter enable signal, CNT_EN, is used as trigger output
UPDATE
The update event is selected as trigger output
COMPAREPULSE
The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred
COMPAREOC1
OC1REF signal is used as trigger output
COMPAREOC2
OC2REF signal is used as trigger output
COMPAREOC3
OC3REF signal is used as trigger output
COMPAREOC4
OC4REF signal is used as trigger output
Implementations§
§impl MMSR
impl MMSR
pub fn is_compare_pulse(&self) -> bool
pub fn is_compare_pulse(&self) -> bool
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
pub fn is_compare_oc1(&self) -> bool
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
pub fn is_compare_oc2(&self) -> bool
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
pub fn is_compare_oc3(&self) -> bool
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
pub fn is_compare_oc4(&self) -> bool
Checks if the value of the field is COMPAREOC4