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#[doc = "Reader of register APB2LPENR"] pub type R = crate::R<u32, super::APB2LPENR>; #[doc = "Writer for register APB2LPENR"] pub type W = crate::W<u32, super::APB2LPENR>; #[doc = "Register APB2LPENR `reset()`'s with value 0x0007_5f33"] impl crate::ResetValue for super::APB2LPENR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0x0007_5f33 } } #[doc = "TIM11 clock enable during Sleep mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum TIM11LPEN_A { #[doc = "0: Selected module is disabled during Sleep mode"] DISABLEDINSLEEP = 0, #[doc = "1: Selected module is enabled during Sleep mode"] ENABLEDINSLEEP = 1, } impl From<TIM11LPEN_A> for bool { #[inline(always)] fn from(variant: TIM11LPEN_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `TIM11LPEN`"] pub type TIM11LPEN_R = crate::R<bool, TIM11LPEN_A>; impl TIM11LPEN_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> TIM11LPEN_A { match self.bits { false => TIM11LPEN_A::DISABLEDINSLEEP, true => TIM11LPEN_A::ENABLEDINSLEEP, } } #[doc = "Checks if the value of the field is `DISABLEDINSLEEP`"] #[inline(always)] pub fn is_disabled_in_sleep(&self) -> bool { *self == TIM11LPEN_A::DISABLEDINSLEEP } #[doc = "Checks if the value of the field is `ENABLEDINSLEEP`"] #[inline(always)] pub fn is_enabled_in_sleep(&self) -> bool { *self == TIM11LPEN_A::ENABLEDINSLEEP } } #[doc = "Write proxy for field `TIM11LPEN`"] pub struct TIM11LPEN_W<'a> { w: &'a mut W, } impl<'a> TIM11LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM11LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Selected module is disabled during Sleep mode"] #[inline(always)] pub fn disabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::DISABLEDINSLEEP) } #[doc = "Selected module is enabled during Sleep mode"] #[inline(always)] pub fn enabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::ENABLEDINSLEEP) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "TIM10 clock enable during Sleep mode"] pub type TIM10LPEN_A = TIM11LPEN_A; #[doc = "Reader of field `TIM10LPEN`"] pub type TIM10LPEN_R = crate::R<bool, TIM11LPEN_A>; #[doc = "Write proxy for field `TIM10LPEN`"] pub struct TIM10LPEN_W<'a> { w: &'a mut W, } impl<'a> TIM10LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM10LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Selected module is disabled during Sleep mode"] #[inline(always)] pub fn disabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::DISABLEDINSLEEP) } #[doc = "Selected module is enabled during Sleep mode"] #[inline(always)] pub fn enabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::ENABLEDINSLEEP) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "TIM9 clock enable during sleep mode"] pub type TIM9LPEN_A = TIM11LPEN_A; #[doc = "Reader of field `TIM9LPEN`"] pub type TIM9LPEN_R = crate::R<bool, TIM11LPEN_A>; #[doc = "Write proxy for field `TIM9LPEN`"] pub struct TIM9LPEN_W<'a> { w: &'a mut W, } impl<'a> TIM9LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM9LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Selected module is disabled during Sleep mode"] #[inline(always)] pub fn disabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::DISABLEDINSLEEP) } #[doc = "Selected module is enabled during Sleep mode"] #[inline(always)] pub fn enabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::ENABLEDINSLEEP) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } #[doc = "System configuration controller clock enable during Sleep mode"] pub type SYSCFGLPEN_A = TIM11LPEN_A; #[doc = "Reader of field `SYSCFGLPEN`"] pub type SYSCFGLPEN_R = crate::R<bool, TIM11LPEN_A>; #[doc = "Write proxy for field `SYSCFGLPEN`"] pub struct SYSCFGLPEN_W<'a> { w: &'a mut W, } impl<'a> SYSCFGLPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SYSCFGLPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Selected module is disabled during Sleep mode"] #[inline(always)] pub fn disabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::DISABLEDINSLEEP) } #[doc = "Selected module is enabled during Sleep mode"] #[inline(always)] pub fn enabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::ENABLEDINSLEEP) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "SPI 1 clock enable during Sleep mode"] pub type SPI1LPEN_A = TIM11LPEN_A; #[doc = "Reader of field `SPI1LPEN`"] pub type SPI1LPEN_R = crate::R<bool, TIM11LPEN_A>; #[doc = "Write proxy for field `SPI1LPEN`"] pub struct SPI1LPEN_W<'a> { w: &'a mut W, } impl<'a> SPI1LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SPI1LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Selected module is disabled during Sleep mode"] #[inline(always)] pub fn disabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::DISABLEDINSLEEP) } #[doc = "Selected module is enabled during Sleep mode"] #[inline(always)] pub fn enabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::ENABLEDINSLEEP) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } #[doc = "SDIO clock enable during Sleep mode"] pub type SDIOLPEN_A = TIM11LPEN_A; #[doc = "Reader of field `SDIOLPEN`"] pub type SDIOLPEN_R = crate::R<bool, TIM11LPEN_A>; #[doc = "Write proxy for field `SDIOLPEN`"] pub struct SDIOLPEN_W<'a> { w: &'a mut W, } impl<'a> SDIOLPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SDIOLPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Selected module is disabled during Sleep mode"] #[inline(always)] pub fn disabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::DISABLEDINSLEEP) } #[doc = "Selected module is enabled during Sleep mode"] #[inline(always)] pub fn enabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::ENABLEDINSLEEP) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "ADC1 clock enable during Sleep mode"] pub type ADC1LPEN_A = TIM11LPEN_A; #[doc = "Reader of field `ADC1LPEN`"] pub type ADC1LPEN_R = crate::R<bool, TIM11LPEN_A>; #[doc = "Write proxy for field `ADC1LPEN`"] pub struct ADC1LPEN_W<'a> { w: &'a mut W, } impl<'a> ADC1LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: ADC1LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Selected module is disabled during Sleep mode"] #[inline(always)] pub fn disabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::DISABLEDINSLEEP) } #[doc = "Selected module is enabled during Sleep mode"] #[inline(always)] pub fn enabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::ENABLEDINSLEEP) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "USART6 clock enable during Sleep mode"] pub type USART6LPEN_A = TIM11LPEN_A; #[doc = "Reader of field `USART6LPEN`"] pub type USART6LPEN_R = crate::R<bool, TIM11LPEN_A>; #[doc = "Write proxy for field `USART6LPEN`"] pub struct USART6LPEN_W<'a> { w: &'a mut W, } impl<'a> USART6LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: USART6LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Selected module is disabled during Sleep mode"] #[inline(always)] pub fn disabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::DISABLEDINSLEEP) } #[doc = "Selected module is enabled during Sleep mode"] #[inline(always)] pub fn enabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::ENABLEDINSLEEP) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "USART1 clock enable during Sleep mode"] pub type USART1LPEN_A = TIM11LPEN_A; #[doc = "Reader of field `USART1LPEN`"] pub type USART1LPEN_R = crate::R<bool, TIM11LPEN_A>; #[doc = "Write proxy for field `USART1LPEN`"] pub struct USART1LPEN_W<'a> { w: &'a mut W, } impl<'a> USART1LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: USART1LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Selected module is disabled during Sleep mode"] #[inline(always)] pub fn disabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::DISABLEDINSLEEP) } #[doc = "Selected module is enabled during Sleep mode"] #[inline(always)] pub fn enabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::ENABLEDINSLEEP) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "TIM1 clock enable during Sleep mode"] pub type TIM1LPEN_A = TIM11LPEN_A; #[doc = "Reader of field `TIM1LPEN`"] pub type TIM1LPEN_R = crate::R<bool, TIM11LPEN_A>; #[doc = "Write proxy for field `TIM1LPEN`"] pub struct TIM1LPEN_W<'a> { w: &'a mut W, } impl<'a> TIM1LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM1LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Selected module is disabled during Sleep mode"] #[inline(always)] pub fn disabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::DISABLEDINSLEEP) } #[doc = "Selected module is enabled during Sleep mode"] #[inline(always)] pub fn enabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::ENABLEDINSLEEP) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "SPI4 clock enable during Sleep mode"] pub type SPI4LPEN_A = TIM11LPEN_A; #[doc = "Reader of field `SPI4LPEN`"] pub type SPI4LPEN_R = crate::R<bool, TIM11LPEN_A>; #[doc = "Write proxy for field `SPI4LPEN`"] pub struct SPI4LPEN_W<'a> { w: &'a mut W, } impl<'a> SPI4LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SPI4LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Selected module is disabled during Sleep mode"] #[inline(always)] pub fn disabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::DISABLEDINSLEEP) } #[doc = "Selected module is enabled during Sleep mode"] #[inline(always)] pub fn enabled_in_sleep(self) -> &'a mut W { self.variant(TIM11LPEN_A::ENABLEDINSLEEP) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); self.w } } impl R { #[doc = "Bit 18 - TIM11 clock enable during Sleep mode"] #[inline(always)] pub fn tim11lpen(&self) -> TIM11LPEN_R { TIM11LPEN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - TIM10 clock enable during Sleep mode"] #[inline(always)] pub fn tim10lpen(&self) -> TIM10LPEN_R { TIM10LPEN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - TIM9 clock enable during sleep mode"] #[inline(always)] pub fn tim9lpen(&self) -> TIM9LPEN_R { TIM9LPEN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 14 - System configuration controller clock enable during Sleep mode"] #[inline(always)] pub fn syscfglpen(&self) -> SYSCFGLPEN_R { SYSCFGLPEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 12 - SPI 1 clock enable during Sleep mode"] #[inline(always)] pub fn spi1lpen(&self) -> SPI1LPEN_R { SPI1LPEN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - SDIO clock enable during Sleep mode"] #[inline(always)] pub fn sdiolpen(&self) -> SDIOLPEN_R { SDIOLPEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 8 - ADC1 clock enable during Sleep mode"] #[inline(always)] pub fn adc1lpen(&self) -> ADC1LPEN_R { ADC1LPEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 5 - USART6 clock enable during Sleep mode"] #[inline(always)] pub fn usart6lpen(&self) -> USART6LPEN_R { USART6LPEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - USART1 clock enable during Sleep mode"] #[inline(always)] pub fn usart1lpen(&self) -> USART1LPEN_R { USART1LPEN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 0 - TIM1 clock enable during Sleep mode"] #[inline(always)] pub fn tim1lpen(&self) -> TIM1LPEN_R { TIM1LPEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 13 - SPI4 clock enable during Sleep mode"] #[inline(always)] pub fn spi4lpen(&self) -> SPI4LPEN_R { SPI4LPEN_R::new(((self.bits >> 13) & 0x01) != 0) } } impl W { #[doc = "Bit 18 - TIM11 clock enable during Sleep mode"] #[inline(always)] pub fn tim11lpen(&mut self) -> TIM11LPEN_W { TIM11LPEN_W { w: self } } #[doc = "Bit 17 - TIM10 clock enable during Sleep mode"] #[inline(always)] pub fn tim10lpen(&mut self) -> TIM10LPEN_W { TIM10LPEN_W { w: self } } #[doc = "Bit 16 - TIM9 clock enable during sleep mode"] #[inline(always)] pub fn tim9lpen(&mut self) -> TIM9LPEN_W { TIM9LPEN_W { w: self } } #[doc = "Bit 14 - System configuration controller clock enable during Sleep mode"] #[inline(always)] pub fn syscfglpen(&mut self) -> SYSCFGLPEN_W { SYSCFGLPEN_W { w: self } } #[doc = "Bit 12 - SPI 1 clock enable during Sleep mode"] #[inline(always)] pub fn spi1lpen(&mut self) -> SPI1LPEN_W { SPI1LPEN_W { w: self } } #[doc = "Bit 11 - SDIO clock enable during Sleep mode"] #[inline(always)] pub fn sdiolpen(&mut self) -> SDIOLPEN_W { SDIOLPEN_W { w: self } } #[doc = "Bit 8 - ADC1 clock enable during Sleep mode"] #[inline(always)] pub fn adc1lpen(&mut self) -> ADC1LPEN_W { ADC1LPEN_W { w: self } } #[doc = "Bit 5 - USART6 clock enable during Sleep mode"] #[inline(always)] pub fn usart6lpen(&mut self) -> USART6LPEN_W { USART6LPEN_W { w: self } } #[doc = "Bit 4 - USART1 clock enable during Sleep mode"] #[inline(always)] pub fn usart1lpen(&mut self) -> USART1LPEN_W { USART1LPEN_W { w: self } } #[doc = "Bit 0 - TIM1 clock enable during Sleep mode"] #[inline(always)] pub fn tim1lpen(&mut self) -> TIM1LPEN_W { TIM1LPEN_W { w: self } } #[doc = "Bit 13 - SPI4 clock enable during Sleep mode"] #[inline(always)] pub fn spi4lpen(&mut self) -> SPI4LPEN_W { SPI4LPEN_W { w: self } } }