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#[doc = "Reader of register APB2ENR"] pub type R = crate::R<u32, super::APB2ENR>; #[doc = "Writer for register APB2ENR"] pub type W = crate::W<u32, super::APB2ENR>; #[doc = "Register APB2ENR `reset()`'s with value 0"] impl crate::ResetValue for super::APB2ENR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "TIM11 clock enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum TIM11EN_A { #[doc = "0: The selected clock is disabled"] DISABLED = 0, #[doc = "1: The selected clock is enabled"] ENABLED = 1, } impl From<TIM11EN_A> for bool { #[inline(always)] fn from(variant: TIM11EN_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `TIM11EN`"] pub type TIM11EN_R = crate::R<bool, TIM11EN_A>; impl TIM11EN_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> TIM11EN_A { match self.bits { false => TIM11EN_A::DISABLED, true => TIM11EN_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == TIM11EN_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == TIM11EN_A::ENABLED } } #[doc = "Write proxy for field `TIM11EN`"] pub struct TIM11EN_W<'a> { w: &'a mut W, } impl<'a> TIM11EN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM11EN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(TIM11EN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(TIM11EN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "TIM10 clock enable"] pub type TIM10EN_A = TIM11EN_A; #[doc = "Reader of field `TIM10EN`"] pub type TIM10EN_R = crate::R<bool, TIM11EN_A>; #[doc = "Write proxy for field `TIM10EN`"] pub struct TIM10EN_W<'a> { w: &'a mut W, } impl<'a> TIM10EN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM10EN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(TIM11EN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(TIM11EN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "TIM9 clock enable"] pub type TIM9EN_A = TIM11EN_A; #[doc = "Reader of field `TIM9EN`"] pub type TIM9EN_R = crate::R<bool, TIM11EN_A>; #[doc = "Write proxy for field `TIM9EN`"] pub struct TIM9EN_W<'a> { w: &'a mut W, } impl<'a> TIM9EN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM9EN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(TIM11EN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(TIM11EN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } #[doc = "System configuration controller clock enable"] pub type SYSCFGEN_A = TIM11EN_A; #[doc = "Reader of field `SYSCFGEN`"] pub type SYSCFGEN_R = crate::R<bool, TIM11EN_A>; #[doc = "Write proxy for field `SYSCFGEN`"] pub struct SYSCFGEN_W<'a> { w: &'a mut W, } impl<'a> SYSCFGEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SYSCFGEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(TIM11EN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(TIM11EN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "SPI1 clock enable"] pub type SPI1EN_A = TIM11EN_A; #[doc = "Reader of field `SPI1EN`"] pub type SPI1EN_R = crate::R<bool, TIM11EN_A>; #[doc = "Write proxy for field `SPI1EN`"] pub struct SPI1EN_W<'a> { w: &'a mut W, } impl<'a> SPI1EN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SPI1EN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(TIM11EN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(TIM11EN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } #[doc = "SDIO clock enable"] pub type SDIOEN_A = TIM11EN_A; #[doc = "Reader of field `SDIOEN`"] pub type SDIOEN_R = crate::R<bool, TIM11EN_A>; #[doc = "Write proxy for field `SDIOEN`"] pub struct SDIOEN_W<'a> { w: &'a mut W, } impl<'a> SDIOEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SDIOEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(TIM11EN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(TIM11EN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "ADC1 clock enable"] pub type ADC1EN_A = TIM11EN_A; #[doc = "Reader of field `ADC1EN`"] pub type ADC1EN_R = crate::R<bool, TIM11EN_A>; #[doc = "Write proxy for field `ADC1EN`"] pub struct ADC1EN_W<'a> { w: &'a mut W, } impl<'a> ADC1EN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: ADC1EN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(TIM11EN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(TIM11EN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "USART6 clock enable"] pub type USART6EN_A = TIM11EN_A; #[doc = "Reader of field `USART6EN`"] pub type USART6EN_R = crate::R<bool, TIM11EN_A>; #[doc = "Write proxy for field `USART6EN`"] pub struct USART6EN_W<'a> { w: &'a mut W, } impl<'a> USART6EN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: USART6EN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(TIM11EN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(TIM11EN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "USART1 clock enable"] pub type USART1EN_A = TIM11EN_A; #[doc = "Reader of field `USART1EN`"] pub type USART1EN_R = crate::R<bool, TIM11EN_A>; #[doc = "Write proxy for field `USART1EN`"] pub struct USART1EN_W<'a> { w: &'a mut W, } impl<'a> USART1EN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: USART1EN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(TIM11EN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(TIM11EN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "TIM1 clock enable"] pub type TIM1EN_A = TIM11EN_A; #[doc = "Reader of field `TIM1EN`"] pub type TIM1EN_R = crate::R<bool, TIM11EN_A>; #[doc = "Write proxy for field `TIM1EN`"] pub struct TIM1EN_W<'a> { w: &'a mut W, } impl<'a> TIM1EN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM1EN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(TIM11EN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(TIM11EN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "SPI4 clock enable"] pub type SPI4EN_A = TIM11EN_A; #[doc = "Reader of field `SPI4EN`"] pub type SPI4EN_R = crate::R<bool, TIM11EN_A>; #[doc = "Write proxy for field `SPI4EN`"] pub struct SPI4EN_W<'a> { w: &'a mut W, } impl<'a> SPI4EN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SPI4EN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(TIM11EN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(TIM11EN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); self.w } } impl R { #[doc = "Bit 18 - TIM11 clock enable"] #[inline(always)] pub fn tim11en(&self) -> TIM11EN_R { TIM11EN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - TIM10 clock enable"] #[inline(always)] pub fn tim10en(&self) -> TIM10EN_R { TIM10EN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - TIM9 clock enable"] #[inline(always)] pub fn tim9en(&self) -> TIM9EN_R { TIM9EN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 14 - System configuration controller clock enable"] #[inline(always)] pub fn syscfgen(&self) -> SYSCFGEN_R { SYSCFGEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 12 - SPI1 clock enable"] #[inline(always)] pub fn spi1en(&self) -> SPI1EN_R { SPI1EN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - SDIO clock enable"] #[inline(always)] pub fn sdioen(&self) -> SDIOEN_R { SDIOEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 8 - ADC1 clock enable"] #[inline(always)] pub fn adc1en(&self) -> ADC1EN_R { ADC1EN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 5 - USART6 clock enable"] #[inline(always)] pub fn usart6en(&self) -> USART6EN_R { USART6EN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - USART1 clock enable"] #[inline(always)] pub fn usart1en(&self) -> USART1EN_R { USART1EN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 0 - TIM1 clock enable"] #[inline(always)] pub fn tim1en(&self) -> TIM1EN_R { TIM1EN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 13 - SPI4 clock enable"] #[inline(always)] pub fn spi4en(&self) -> SPI4EN_R { SPI4EN_R::new(((self.bits >> 13) & 0x01) != 0) } } impl W { #[doc = "Bit 18 - TIM11 clock enable"] #[inline(always)] pub fn tim11en(&mut self) -> TIM11EN_W { TIM11EN_W { w: self } } #[doc = "Bit 17 - TIM10 clock enable"] #[inline(always)] pub fn tim10en(&mut self) -> TIM10EN_W { TIM10EN_W { w: self } } #[doc = "Bit 16 - TIM9 clock enable"] #[inline(always)] pub fn tim9en(&mut self) -> TIM9EN_W { TIM9EN_W { w: self } } #[doc = "Bit 14 - System configuration controller clock enable"] #[inline(always)] pub fn syscfgen(&mut self) -> SYSCFGEN_W { SYSCFGEN_W { w: self } } #[doc = "Bit 12 - SPI1 clock enable"] #[inline(always)] pub fn spi1en(&mut self) -> SPI1EN_W { SPI1EN_W { w: self } } #[doc = "Bit 11 - SDIO clock enable"] #[inline(always)] pub fn sdioen(&mut self) -> SDIOEN_W { SDIOEN_W { w: self } } #[doc = "Bit 8 - ADC1 clock enable"] #[inline(always)] pub fn adc1en(&mut self) -> ADC1EN_W { ADC1EN_W { w: self } } #[doc = "Bit 5 - USART6 clock enable"] #[inline(always)] pub fn usart6en(&mut self) -> USART6EN_W { USART6EN_W { w: self } } #[doc = "Bit 4 - USART1 clock enable"] #[inline(always)] pub fn usart1en(&mut self) -> USART1EN_W { USART1EN_W { w: self } } #[doc = "Bit 0 - TIM1 clock enable"] #[inline(always)] pub fn tim1en(&mut self) -> TIM1EN_W { TIM1EN_W { w: self } } #[doc = "Bit 13 - SPI4 clock enable"] #[inline(always)] pub fn spi4en(&mut self) -> SPI4EN_W { SPI4EN_W { w: self } } }