#[doc = "Reader of register APB1ENR"]
pub type R = crate::R<u32, super::APB1ENR>;
#[doc = "Writer for register APB1ENR"]
pub type W = crate::W<u32, super::APB1ENR>;
#[doc = "Register APB1ENR `reset()`'s with value 0"]
impl crate::ResetValue for super::APB1ENR {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "TIM2 clock enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIM2EN_A {
#[doc = "0: The selected clock is disabled"]
DISABLED = 0,
#[doc = "1: The selected clock is enabled"]
ENABLED = 1,
}
impl From<TIM2EN_A> for bool {
#[inline(always)]
fn from(variant: TIM2EN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `TIM2EN`"]
pub type TIM2EN_R = crate::R<bool, TIM2EN_A>;
impl TIM2EN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> TIM2EN_A {
match self.bits {
false => TIM2EN_A::DISABLED,
true => TIM2EN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == TIM2EN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == TIM2EN_A::ENABLED
}
}
#[doc = "Write proxy for field `TIM2EN`"]
pub struct TIM2EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM2EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
#[doc = "TIM3 clock enable"]
pub type TIM3EN_A = TIM2EN_A;
#[doc = "Reader of field `TIM3EN`"]
pub type TIM3EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `TIM3EN`"]
pub struct TIM3EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM3EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM3EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "TIM4 clock enable"]
pub type TIM4EN_A = TIM2EN_A;
#[doc = "Reader of field `TIM4EN`"]
pub type TIM4EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `TIM4EN`"]
pub struct TIM4EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM4EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM4EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "TIM5 clock enable"]
pub type TIM5EN_A = TIM2EN_A;
#[doc = "Reader of field `TIM5EN`"]
pub type TIM5EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `TIM5EN`"]
pub struct TIM5EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM5EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM5EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
self.w
}
}
#[doc = "TIM6EN"]
pub type TIM6EN_A = TIM2EN_A;
#[doc = "Reader of field `TIM6EN`"]
pub type TIM6EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `TIM6EN`"]
pub struct TIM6EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM6EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM6EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
self.w
}
}
#[doc = "TIM7EN"]
pub type TIM7EN_A = TIM2EN_A;
#[doc = "Reader of field `TIM7EN`"]
pub type TIM7EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `TIM7EN`"]
pub struct TIM7EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM7EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM7EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
#[doc = "TIM12EN"]
pub type TIM12EN_A = TIM2EN_A;
#[doc = "Reader of field `TIM12EN`"]
pub type TIM12EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `TIM12EN`"]
pub struct TIM12EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM12EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM12EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
self.w
}
}
#[doc = "TIM13EN"]
pub type TIM13EN_A = TIM2EN_A;
#[doc = "Reader of field `TIM13EN`"]
pub type TIM13EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `TIM13EN`"]
pub struct TIM13EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM13EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM13EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
self.w
}
}
#[doc = "TIM14EN"]
pub type TIM14EN_A = TIM2EN_A;
#[doc = "Reader of field `TIM14EN`"]
pub type TIM14EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `TIM14EN`"]
pub struct TIM14EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM14EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM14EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
self.w
}
}
#[doc = "Window watchdog clock enable"]
pub type WWDGEN_A = TIM2EN_A;
#[doc = "Reader of field `WWDGEN`"]
pub type WWDGEN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `WWDGEN`"]
pub struct WWDGEN_W<'a> {
w: &'a mut W,
}
impl<'a> WWDGEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: WWDGEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
self.w
}
}
#[doc = "SPI2 clock enable"]
pub type SPI2EN_A = TIM2EN_A;
#[doc = "Reader of field `SPI2EN`"]
pub type SPI2EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `SPI2EN`"]
pub struct SPI2EN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI2EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
self.w
}
}
#[doc = "SPI3 clock enable"]
pub type SPI3EN_A = TIM2EN_A;
#[doc = "Reader of field `SPI3EN`"]
pub type SPI3EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `SPI3EN`"]
pub struct SPI3EN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI3EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI3EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
self.w
}
}
#[doc = "USART 2 clock enable"]
pub type USART2EN_A = TIM2EN_A;
#[doc = "Reader of field `USART2EN`"]
pub type USART2EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `USART2EN`"]
pub struct USART2EN_W<'a> {
w: &'a mut W,
}
impl<'a> USART2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART2EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
self.w
}
}
#[doc = "USART3EN"]
pub type USART3EN_A = TIM2EN_A;
#[doc = "Reader of field `USART3EN`"]
pub type USART3EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `USART3EN`"]
pub struct USART3EN_W<'a> {
w: &'a mut W,
}
impl<'a> USART3EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART3EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
self.w
}
}
#[doc = "I2C1 clock enable"]
pub type I2C1EN_A = TIM2EN_A;
#[doc = "Reader of field `I2C1EN`"]
pub type I2C1EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `I2C1EN`"]
pub struct I2C1EN_W<'a> {
w: &'a mut W,
}
impl<'a> I2C1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C1EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
self.w
}
}
#[doc = "I2C2 clock enable"]
pub type I2C2EN_A = TIM2EN_A;
#[doc = "Reader of field `I2C2EN`"]
pub type I2C2EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `I2C2EN`"]
pub struct I2C2EN_W<'a> {
w: &'a mut W,
}
impl<'a> I2C2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C2EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
self.w
}
}
#[doc = "I2C3 clock enable"]
pub type I2C3EN_A = TIM2EN_A;
#[doc = "Reader of field `I2C3EN`"]
pub type I2C3EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `I2C3EN`"]
pub struct I2C3EN_W<'a> {
w: &'a mut W,
}
impl<'a> I2C3EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C3EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
self.w
}
}
#[doc = "FMPI2C1 clock enable"]
pub type FMPI2C1EN_A = TIM2EN_A;
#[doc = "Reader of field `FMPI2C1EN`"]
pub type FMPI2C1EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `FMPI2C1EN`"]
pub struct FMPI2C1EN_W<'a> {
w: &'a mut W,
}
impl<'a> FMPI2C1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: FMPI2C1EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
self.w
}
}
#[doc = "CAN1EN"]
pub type CAN1EN_A = TIM2EN_A;
#[doc = "Reader of field `CAN1EN`"]
pub type CAN1EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `CAN1EN`"]
pub struct CAN1EN_W<'a> {
w: &'a mut W,
}
impl<'a> CAN1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CAN1EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
self.w
}
}
#[doc = "CAN2EN"]
pub type CAN2EN_A = TIM2EN_A;
#[doc = "Reader of field `CAN2EN`"]
pub type CAN2EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `CAN2EN`"]
pub struct CAN2EN_W<'a> {
w: &'a mut W,
}
impl<'a> CAN2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CAN2EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
self.w
}
}
#[doc = "Power interface clock enable"]
pub type PWREN_A = TIM2EN_A;
#[doc = "Reader of field `PWREN`"]
pub type PWREN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `PWREN`"]
pub struct PWREN_W<'a> {
w: &'a mut W,
}
impl<'a> PWREN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: PWREN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
self.w
}
}
#[doc = "LPTimer 1 clock enable"]
pub type LPTIMER1EN_A = TIM2EN_A;
#[doc = "Reader of field `LPTIMER1EN`"]
pub type LPTIMER1EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `LPTIMER1EN`"]
pub struct LPTIMER1EN_W<'a> {
w: &'a mut W,
}
impl<'a> LPTIMER1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LPTIMER1EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
self.w
}
}
#[doc = "clock enable"]
pub type RTCAPBEN_A = TIM2EN_A;
#[doc = "Reader of field `RTCAPBEN`"]
pub type RTCAPBEN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `RTCAPBEN`"]
pub struct RTCAPBEN_W<'a> {
w: &'a mut W,
}
impl<'a> RTCAPBEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: RTCAPBEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
self.w
}
}
#[doc = "UART 4 clock enable"]
pub type UART4EN_A = TIM2EN_A;
#[doc = "Reader of field `UART4EN`"]
pub type UART4EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `UART4EN`"]
pub struct UART4EN_W<'a> {
w: &'a mut W,
}
impl<'a> UART4EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART4EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
self.w
}
}
#[doc = "UART 5 clock enable"]
pub type UART5EN_A = TIM2EN_A;
#[doc = "Reader of field `UART5EN`"]
pub type UART5EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `UART5EN`"]
pub struct UART5EN_W<'a> {
w: &'a mut W,
}
impl<'a> UART5EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART5EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
self.w
}
}
#[doc = "CAN 3 clock enable"]
pub type CAN3EN_A = TIM2EN_A;
#[doc = "Reader of field `CAN3EN`"]
pub type CAN3EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `CAN3EN`"]
pub struct CAN3EN_W<'a> {
w: &'a mut W,
}
impl<'a> CAN3EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CAN3EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
self.w
}
}
#[doc = "DAC clock enable"]
pub type DACEN_A = TIM2EN_A;
#[doc = "Reader of field `DACEN`"]
pub type DACEN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `DACEN`"]
pub struct DACEN_W<'a> {
w: &'a mut W,
}
impl<'a> DACEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DACEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
self.w
}
}
#[doc = "UART7 clock enable"]
pub type UART7EN_A = TIM2EN_A;
#[doc = "Reader of field `UART7EN`"]
pub type UART7EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `UART7EN`"]
pub struct UART7EN_W<'a> {
w: &'a mut W,
}
impl<'a> UART7EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART7EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
self.w
}
}
#[doc = "UART8 clock enable"]
pub type UART8EN_A = TIM2EN_A;
#[doc = "Reader of field `UART8EN`"]
pub type UART8EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `UART8EN`"]
pub struct UART8EN_W<'a> {
w: &'a mut W,
}
impl<'a> UART8EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART8EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
self.w
}
}
impl R {
#[doc = "Bit 0 - TIM2 clock enable"]
#[inline(always)]
pub fn tim2en(&self) -> TIM2EN_R {
TIM2EN_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 1 - TIM3 clock enable"]
#[inline(always)]
pub fn tim3en(&self) -> TIM3EN_R {
TIM3EN_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - TIM4 clock enable"]
#[inline(always)]
pub fn tim4en(&self) -> TIM4EN_R {
TIM4EN_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 3 - TIM5 clock enable"]
#[inline(always)]
pub fn tim5en(&self) -> TIM5EN_R {
TIM5EN_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 4 - TIM6EN"]
#[inline(always)]
pub fn tim6en(&self) -> TIM6EN_R {
TIM6EN_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - TIM7EN"]
#[inline(always)]
pub fn tim7en(&self) -> TIM7EN_R {
TIM7EN_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 6 - TIM12EN"]
#[inline(always)]
pub fn tim12en(&self) -> TIM12EN_R {
TIM12EN_R::new(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 7 - TIM13EN"]
#[inline(always)]
pub fn tim13en(&self) -> TIM13EN_R {
TIM13EN_R::new(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 8 - TIM14EN"]
#[inline(always)]
pub fn tim14en(&self) -> TIM14EN_R {
TIM14EN_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 11 - Window watchdog clock enable"]
#[inline(always)]
pub fn wwdgen(&self) -> WWDGEN_R {
WWDGEN_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 14 - SPI2 clock enable"]
#[inline(always)]
pub fn spi2en(&self) -> SPI2EN_R {
SPI2EN_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 15 - SPI3 clock enable"]
#[inline(always)]
pub fn spi3en(&self) -> SPI3EN_R {
SPI3EN_R::new(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bit 17 - USART 2 clock enable"]
#[inline(always)]
pub fn usart2en(&self) -> USART2EN_R {
USART2EN_R::new(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bit 18 - USART3EN"]
#[inline(always)]
pub fn usart3en(&self) -> USART3EN_R {
USART3EN_R::new(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 21 - I2C1 clock enable"]
#[inline(always)]
pub fn i2c1en(&self) -> I2C1EN_R {
I2C1EN_R::new(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bit 22 - I2C2 clock enable"]
#[inline(always)]
pub fn i2c2en(&self) -> I2C2EN_R {
I2C2EN_R::new(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 23 - I2C3 clock enable"]
#[inline(always)]
pub fn i2c3en(&self) -> I2C3EN_R {
I2C3EN_R::new(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 24 - FMPI2C1 clock enable"]
#[inline(always)]
pub fn fmpi2c1en(&self) -> FMPI2C1EN_R {
FMPI2C1EN_R::new(((self.bits >> 24) & 0x01) != 0)
}
#[doc = "Bit 25 - CAN1EN"]
#[inline(always)]
pub fn can1en(&self) -> CAN1EN_R {
CAN1EN_R::new(((self.bits >> 25) & 0x01) != 0)
}
#[doc = "Bit 26 - CAN2EN"]
#[inline(always)]
pub fn can2en(&self) -> CAN2EN_R {
CAN2EN_R::new(((self.bits >> 26) & 0x01) != 0)
}
#[doc = "Bit 28 - Power interface clock enable"]
#[inline(always)]
pub fn pwren(&self) -> PWREN_R {
PWREN_R::new(((self.bits >> 28) & 0x01) != 0)
}
#[doc = "Bit 9 - LPTimer 1 clock enable"]
#[inline(always)]
pub fn lptimer1en(&self) -> LPTIMER1EN_R {
LPTIMER1EN_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 10 - clock enable"]
#[inline(always)]
pub fn rtcapben(&self) -> RTCAPBEN_R {
RTCAPBEN_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 19 - UART 4 clock enable"]
#[inline(always)]
pub fn uart4en(&self) -> UART4EN_R {
UART4EN_R::new(((self.bits >> 19) & 0x01) != 0)
}
#[doc = "Bit 20 - UART 5 clock enable"]
#[inline(always)]
pub fn uart5en(&self) -> UART5EN_R {
UART5EN_R::new(((self.bits >> 20) & 0x01) != 0)
}
#[doc = "Bit 27 - CAN 3 clock enable"]
#[inline(always)]
pub fn can3en(&self) -> CAN3EN_R {
CAN3EN_R::new(((self.bits >> 27) & 0x01) != 0)
}
#[doc = "Bit 29 - DAC clock enable"]
#[inline(always)]
pub fn dacen(&self) -> DACEN_R {
DACEN_R::new(((self.bits >> 29) & 0x01) != 0)
}
#[doc = "Bit 30 - UART7 clock enable"]
#[inline(always)]
pub fn uart7en(&self) -> UART7EN_R {
UART7EN_R::new(((self.bits >> 30) & 0x01) != 0)
}
#[doc = "Bit 31 - UART8 clock enable"]
#[inline(always)]
pub fn uart8en(&self) -> UART8EN_R {
UART8EN_R::new(((self.bits >> 31) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 0 - TIM2 clock enable"]
#[inline(always)]
pub fn tim2en(&mut self) -> TIM2EN_W {
TIM2EN_W { w: self }
}
#[doc = "Bit 1 - TIM3 clock enable"]
#[inline(always)]
pub fn tim3en(&mut self) -> TIM3EN_W {
TIM3EN_W { w: self }
}
#[doc = "Bit 2 - TIM4 clock enable"]
#[inline(always)]
pub fn tim4en(&mut self) -> TIM4EN_W {
TIM4EN_W { w: self }
}
#[doc = "Bit 3 - TIM5 clock enable"]
#[inline(always)]
pub fn tim5en(&mut self) -> TIM5EN_W {
TIM5EN_W { w: self }
}
#[doc = "Bit 4 - TIM6EN"]
#[inline(always)]
pub fn tim6en(&mut self) -> TIM6EN_W {
TIM6EN_W { w: self }
}
#[doc = "Bit 5 - TIM7EN"]
#[inline(always)]
pub fn tim7en(&mut self) -> TIM7EN_W {
TIM7EN_W { w: self }
}
#[doc = "Bit 6 - TIM12EN"]
#[inline(always)]
pub fn tim12en(&mut self) -> TIM12EN_W {
TIM12EN_W { w: self }
}
#[doc = "Bit 7 - TIM13EN"]
#[inline(always)]
pub fn tim13en(&mut self) -> TIM13EN_W {
TIM13EN_W { w: self }
}
#[doc = "Bit 8 - TIM14EN"]
#[inline(always)]
pub fn tim14en(&mut self) -> TIM14EN_W {
TIM14EN_W { w: self }
}
#[doc = "Bit 11 - Window watchdog clock enable"]
#[inline(always)]
pub fn wwdgen(&mut self) -> WWDGEN_W {
WWDGEN_W { w: self }
}
#[doc = "Bit 14 - SPI2 clock enable"]
#[inline(always)]
pub fn spi2en(&mut self) -> SPI2EN_W {
SPI2EN_W { w: self }
}
#[doc = "Bit 15 - SPI3 clock enable"]
#[inline(always)]
pub fn spi3en(&mut self) -> SPI3EN_W {
SPI3EN_W { w: self }
}
#[doc = "Bit 17 - USART 2 clock enable"]
#[inline(always)]
pub fn usart2en(&mut self) -> USART2EN_W {
USART2EN_W { w: self }
}
#[doc = "Bit 18 - USART3EN"]
#[inline(always)]
pub fn usart3en(&mut self) -> USART3EN_W {
USART3EN_W { w: self }
}
#[doc = "Bit 21 - I2C1 clock enable"]
#[inline(always)]
pub fn i2c1en(&mut self) -> I2C1EN_W {
I2C1EN_W { w: self }
}
#[doc = "Bit 22 - I2C2 clock enable"]
#[inline(always)]
pub fn i2c2en(&mut self) -> I2C2EN_W {
I2C2EN_W { w: self }
}
#[doc = "Bit 23 - I2C3 clock enable"]
#[inline(always)]
pub fn i2c3en(&mut self) -> I2C3EN_W {
I2C3EN_W { w: self }
}
#[doc = "Bit 24 - FMPI2C1 clock enable"]
#[inline(always)]
pub fn fmpi2c1en(&mut self) -> FMPI2C1EN_W {
FMPI2C1EN_W { w: self }
}
#[doc = "Bit 25 - CAN1EN"]
#[inline(always)]
pub fn can1en(&mut self) -> CAN1EN_W {
CAN1EN_W { w: self }
}
#[doc = "Bit 26 - CAN2EN"]
#[inline(always)]
pub fn can2en(&mut self) -> CAN2EN_W {
CAN2EN_W { w: self }
}
#[doc = "Bit 28 - Power interface clock enable"]
#[inline(always)]
pub fn pwren(&mut self) -> PWREN_W {
PWREN_W { w: self }
}
#[doc = "Bit 9 - LPTimer 1 clock enable"]
#[inline(always)]
pub fn lptimer1en(&mut self) -> LPTIMER1EN_W {
LPTIMER1EN_W { w: self }
}
#[doc = "Bit 10 - clock enable"]
#[inline(always)]
pub fn rtcapben(&mut self) -> RTCAPBEN_W {
RTCAPBEN_W { w: self }
}
#[doc = "Bit 19 - UART 4 clock enable"]
#[inline(always)]
pub fn uart4en(&mut self) -> UART4EN_W {
UART4EN_W { w: self }
}
#[doc = "Bit 20 - UART 5 clock enable"]
#[inline(always)]
pub fn uart5en(&mut self) -> UART5EN_W {
UART5EN_W { w: self }
}
#[doc = "Bit 27 - CAN 3 clock enable"]
#[inline(always)]
pub fn can3en(&mut self) -> CAN3EN_W {
CAN3EN_W { w: self }
}
#[doc = "Bit 29 - DAC clock enable"]
#[inline(always)]
pub fn dacen(&mut self) -> DACEN_W {
DACEN_W { w: self }
}
#[doc = "Bit 30 - UART7 clock enable"]
#[inline(always)]
pub fn uart7en(&mut self) -> UART7EN_W {
UART7EN_W { w: self }
}
#[doc = "Bit 31 - UART8 clock enable"]
#[inline(always)]
pub fn uart8en(&mut self) -> UART8EN_W {
UART8EN_W { w: self }
}
}