Module stm32f3xx_hal_v2::rcc

Reset and Clock Control

The most important function this module delivers is the clock configuration.

To configure the clock, we first have to obtain the device peripherals.

// Get our peripherals
let dp = pac::Peripherals::take().unwrap();

let mut flash = dp.FLASH.constrain();
let mut rcc = dp.RCC.constrain();

After that we can configure the clock

let clocks = rcc.cfgr
    // Using the external oscillator
    // Set the frequency to that of the external oscillator
    .use_hse(8.mhz())
    // Set the frequency for the AHB bus,
    // which the root of every following clock peripheral
    .hclk(48.mhz())
    // The sysclk is equivalent to the core clock
    .sysclk(48.mhz())
    // The following are peripheral clocks, which are both
    // needed to configure specific peripherals.
    // Looking at the peripheral function parameters
    // should give more insight, which peripheral clock is needed.
    .pclk1(12.mhz())
    .pclk2(12.mhz())
    // Freeze / apply the configuration and setup all clocks
    .freeze(&mut flash.acr);

All fields can be omitted and will internally be set to a calculated default. For more details read the documentation of the CFGR methods to find out how to setup the clock.

Structs

AHB	AMBA High-performance Bus (AHB) registers
APB1	Advanced Peripheral Bus 1 (APB1) registers
APB2	Advanced Peripheral Bus 2 (APB2) registers
BDCR	Backup Domain Control register (RCC_BDCR)
CFGR	Clock configuration
Clocks	Frozen clock frequencies
Rcc	Constrained RCC peripheral

Traits

RccExt

Extension trait that constrains the RCC peripheral