Struct stm32f30x::rcc::RegisterBlock
[−]
[src]
#[repr(C)]pub struct RegisterBlock { pub cr: CR, pub cfgr: CFGR, pub cir: CIR, pub apb2rstr: APB2RSTR, pub apb1rstr: APB1RSTR, pub ahbenr: AHBENR, pub apb2enr: APB2ENR, pub apb1enr: APB1ENR, pub bdcr: BDCR, pub csr: CSR, pub ahbrstr: AHBRSTR, pub cfgr2: CFGR2, pub cfgr3: CFGR3, }
Register block
Fields
cr: CR
0x00 - Clock control register
cfgr: CFGR
0x04 - Clock configuration register (RCC_CFGR)
cir: CIR
0x08 - Clock interrupt register (RCC_CIR)
apb2rstr: APB2RSTR
0x0c - APB2 peripheral reset register (RCC_APB2RSTR)
apb1rstr: APB1RSTR
0x10 - APB1 peripheral reset register (RCC_APB1RSTR)
ahbenr: AHBENR
0x14 - AHB Peripheral Clock enable register (RCC_AHBENR)
apb2enr: APB2ENR
0x18 - APB2 peripheral clock enable register (RCC_APB2ENR)
apb1enr: APB1ENR
0x1c - APB1 peripheral clock enable register (RCC_APB1ENR)
bdcr: BDCR
0x20 - Backup domain control register (RCC_BDCR)
csr: CSR
0x24 - Control/status register (RCC_CSR)
ahbrstr: AHBRSTR
0x28 - AHB peripheral reset register
cfgr2: CFGR2
0x2c - Clock configuration register 2
cfgr3: CFGR3
0x30 - Clock configuration register 3