Struct stm32f30x::dac::RegisterBlock [−] [src]

#[repr(C)]
pub struct RegisterBlock {
    pub cr: Cr,
    pub swtrigr: Swtrigr,
    pub dhr12r1: Dhr12r1,
    pub dhr12l1: Dhr12l1,
    pub dhr8r1: Dhr8r1,
    pub dhr12r2: Dhr12r2,
    pub dhr12l2: Dhr12l2,
    pub dhr8r2: Dhr8r2,
    pub dhr12rd: Dhr12rd,
    pub dhr12ld: Dhr12ld,
    pub dhr8rd: Dhr8rd,
    pub dor1: Dor1,
    pub dor2: Dor2,
    pub sr: Sr,
}

Register block

Fields

cr: Cr

0x00 - control register

swtrigr: Swtrigr

0x04 - software trigger register

dhr12r1: Dhr12r1

0x08 - channel1 12-bit right-aligned data holding register

dhr12l1: Dhr12l1

0x0c - channel1 12-bit left aligned data holding register

dhr8r1: Dhr8r1

0x10 - channel1 8-bit right aligned data holding register

dhr12r2: Dhr12r2

0x14 - channel2 12-bit right aligned data holding register

dhr12l2: Dhr12l2

0x18 - channel2 12-bit left aligned data holding register

dhr8r2: Dhr8r2

0x1c - channel2 8-bit right-aligned data holding register

dhr12rd: Dhr12rd

0x20 - Dual DAC 12-bit right-aligned data holding register

dhr12ld: Dhr12ld

0x24 - DUAL DAC 12-bit left aligned data holding register

dhr8rd: Dhr8rd

0x28 - DUAL DAC 8-bit right aligned data holding register

dor1: Dor1

0x2c - channel1 data output register

dor2: Dor2

0x30 - channel2 data output register

sr: Sr

0x34 - status register