Struct stm32f30x::rcc::RegisterBlock

pub struct RegisterBlock {
    pub cr: Cr,
    pub cfgr: Cfgr,
    pub cir: Cir,
    pub apb2rstr: Apb2rstr,
    pub apb1rstr: Apb1rstr,
    pub ahbenr: Ahbenr,
    pub apb2enr: Apb2enr,
    pub apb1enr: Apb1enr,
    pub bdcr: Bdcr,
    pub csr: Csr,
    pub ahbrstr: Ahbrstr,
    pub cfgr2: Cfgr2,
    pub cfgr3: Cfgr3,
}

Register block

Fields

cr: Cr

0x00 - Clock control register

cfgr: Cfgr

0x04 - Clock configuration register (RCC_CFGR)

cir: Cir

0x08 - Clock interrupt register (RCC_CIR)

apb2rstr: Apb2rstr

0x0c - APB2 peripheral reset register (RCC_APB2RSTR)

apb1rstr: Apb1rstr

0x10 - APB1 peripheral reset register (RCC_APB1RSTR)

ahbenr: Ahbenr

0x14 - AHB Peripheral Clock enable register (RCC_AHBENR)

apb2enr: Apb2enr

0x18 - APB2 peripheral clock enable register (RCC_APB2ENR)

apb1enr: Apb1enr

0x1c - APB1 peripheral clock enable register (RCC_APB1ENR)

bdcr: Bdcr

0x20 - Backup domain control register (RCC_BDCR)

csr: Csr

0x24 - Control/status register (RCC_CSR)

ahbrstr: Ahbrstr

0x28 - AHB peripheral reset register

cfgr2: Cfgr2

0x2c - Clock configuration register 2

cfgr3: Cfgr3

0x30 - Clock configuration register 3