Expand description
Sigma-delta analog-to-digital converter
Modules
interrupt and status clear register
configuration 0 register
configuration 1 register
configuration 2 register
channel configuration register 1
channel configuration register 2
control register 1
control register 2
interrupt and status register
injected channel group selection register
SDADC1 and SDADC2 injected data register
SDADC1 and SDADC3 injected data register
data register for injected group
SDADC1 and SDADC2 regular data register
SDADC1 and SDADC3 regular data register
data register for the regular channel
Structs
Register block
Type Definitions
CLRISR register accessor: an alias for Reg<CLRISR_SPEC>
CONF0R register accessor: an alias for Reg<CONF0R_SPEC>
CONF1R register accessor: an alias for Reg<CONF1R_SPEC>
CONF2R register accessor: an alias for Reg<CONF2R_SPEC>
CONFCHR1 register accessor: an alias for Reg<CONFCHR1_SPEC>
CONFCHR2 register accessor: an alias for Reg<CONFCHR2_SPEC>
CR1 register accessor: an alias for Reg<CR1_SPEC>
CR2 register accessor: an alias for Reg<CR2_SPEC>
ISR register accessor: an alias for Reg<ISR_SPEC>
JCHGR register accessor: an alias for Reg<JCHGR_SPEC>
JDATA12R register accessor: an alias for Reg<JDATA12R_SPEC>
JDATA13R register accessor: an alias for Reg<JDATA13R_SPEC>
JDATAR register accessor: an alias for Reg<JDATAR_SPEC>
RDATA12R register accessor: an alias for Reg<RDATA12R_SPEC>
RDATA13R register accessor: an alias for Reg<RDATA13R_SPEC>
RDATAR register accessor: an alias for Reg<RDATAR_SPEC>