1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216
#[doc = "Reader of register I2SPR"] pub type R = crate::R<u32, super::I2SPR>; #[doc = "Writer for register I2SPR"] pub type W = crate::W<u32, super::I2SPR>; #[doc = "Register I2SPR `reset()`'s with value 0x10"] impl crate::ResetValue for super::I2SPR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0x10 } } #[doc = "Master clock output enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum MCKOE_A { #[doc = "0: Master clock output is disabled"] DISABLED, #[doc = "1: Master clock output is enabled"] ENABLED, } impl From<MCKOE_A> for bool { #[inline(always)] fn from(variant: MCKOE_A) -> Self { match variant { MCKOE_A::DISABLED => false, MCKOE_A::ENABLED => true, } } } #[doc = "Reader of field `MCKOE`"] pub type MCKOE_R = crate::R<bool, MCKOE_A>; impl MCKOE_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> MCKOE_A { match self.bits { false => MCKOE_A::DISABLED, true => MCKOE_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == MCKOE_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == MCKOE_A::ENABLED } } #[doc = "Write proxy for field `MCKOE`"] pub struct MCKOE_W<'a> { w: &'a mut W, } impl<'a> MCKOE_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: MCKOE_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Master clock output is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(MCKOE_A::DISABLED) } #[doc = "Master clock output is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(MCKOE_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Odd factor for the prescaler\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum ODD_A { #[doc = "0: Real divider value is I2SDIV * 2"] EVEN, #[doc = "1: Real divider value is (I2SDIV * 2) + 1"] ODD, } impl From<ODD_A> for bool { #[inline(always)] fn from(variant: ODD_A) -> Self { match variant { ODD_A::EVEN => false, ODD_A::ODD => true, } } } #[doc = "Reader of field `ODD`"] pub type ODD_R = crate::R<bool, ODD_A>; impl ODD_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> ODD_A { match self.bits { false => ODD_A::EVEN, true => ODD_A::ODD, } } #[doc = "Checks if the value of the field is `EVEN`"] #[inline(always)] pub fn is_even(&self) -> bool { *self == ODD_A::EVEN } #[doc = "Checks if the value of the field is `ODD`"] #[inline(always)] pub fn is_odd(&self) -> bool { *self == ODD_A::ODD } } #[doc = "Write proxy for field `ODD`"] pub struct ODD_W<'a> { w: &'a mut W, } impl<'a> ODD_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: ODD_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Real divider value is I2SDIV * 2"] #[inline(always)] pub fn even(self) -> &'a mut W { self.variant(ODD_A::EVEN) } #[doc = "Real divider value is (I2SDIV * 2) + 1"] #[inline(always)] pub fn odd(self) -> &'a mut W { self.variant(ODD_A::ODD) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Reader of field `I2SDIV`"] pub type I2SDIV_R = crate::R<u8, u8>; #[doc = "Write proxy for field `I2SDIV`"] pub struct I2SDIV_W<'a> { w: &'a mut W, } impl<'a> I2SDIV_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff); self.w } } impl R { #[doc = "Bit 9 - Master clock output enable"] #[inline(always)] pub fn mckoe(&self) -> MCKOE_R { MCKOE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Odd factor for the prescaler"] #[inline(always)] pub fn odd(&self) -> ODD_R { ODD_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 0:7 - I2S Linear prescaler"] #[inline(always)] pub fn i2sdiv(&self) -> I2SDIV_R { I2SDIV_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bit 9 - Master clock output enable"] #[inline(always)] pub fn mckoe(&mut self) -> MCKOE_W { MCKOE_W { w: self } } #[doc = "Bit 8 - Odd factor for the prescaler"] #[inline(always)] pub fn odd(&mut self) -> ODD_W { ODD_W { w: self } } #[doc = "Bits 0:7 - I2S Linear prescaler"] #[inline(always)] pub fn i2sdiv(&mut self) -> I2SDIV_W { I2SDIV_W { w: self } } }