[−][src]Struct stm32f3::stm32f303::can::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub mcr: MCR,
    pub msr: MSR,
    pub tsr: TSR,
    pub rfr: [RFR; 2],
    pub ier: IER,
    pub esr: ESR,
    pub btr: BTR,
    pub tx: [TX; 3],
    pub rx: [RX; 2],
    pub fmr: FMR,
    pub fm1r: FM1R,
    pub fs1r: FS1R,
    pub ffa1r: FFA1R,
    pub fa1r: FA1R,
    pub fb: [FB; 28],
    // some fields omitted
}

Register block

Fields

mcr: MCR

0x00 - master control register

msr: MSR

0x04 - master status register

tsr: TSR

0x08 - transmit status register

rfr: [RFR; 2]

0x0c - receive FIFO 0 register

ier: IER

0x14 - interrupt enable register

esr: ESR

0x18 - error status register

btr: BTR

0x1c - bit timing register

tx: [TX; 3]

0x180 - CAN Transmit cluster

rx: [RX; 2]

0x1b0 - CAN Receive cluster

fmr: FMR

0x200 - filter master register

fm1r: FM1R

0x204 - filter mode register

fs1r: FS1R

0x20c - filter scale register

ffa1r: FFA1R

0x214 - filter FIFO assignment register

fa1r: FA1R

0x21c - CAN filter activation register

fb: [FB; 28]

0x240 - CAN Filter Bank cluster

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