#[doc = r"Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r"Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CR1 {
#[doc = r"Modifies the contents of the register"]
#[inline(always)]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
self.register.set(f(&R { bits }, &mut W { bits }).bits);
}
#[doc = r"Reads the contents of the register"]
#[inline(always)]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r"Writes to the register"]
#[inline(always)]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
self.register.set(
f(&mut W {
bits: Self::reset_value(),
})
.bits,
);
}
#[doc = r"Reset value of the register"]
#[inline(always)]
pub const fn reset_value() -> u32 {
0
}
#[doc = r"Writes the reset value to the register"]
#[inline(always)]
pub fn reset(&self) {
self.register.set(Self::reset_value())
}
}
#[doc = "Possible values of the field `CEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CENR {
#[doc = "Counter disabled"]
DISABLED,
#[doc = "Counter enabled"]
ENABLED,
}
impl CENR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
CENR::DISABLED => false,
CENR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> CENR {
match value {
false => CENR::DISABLED,
true => CENR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CENR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CENR::ENABLED
}
}
#[doc = "Values that can be written to the field `CEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CENW {
#[doc = "Counter disabled"]
DISABLED,
#[doc = "Counter enabled"]
ENABLED,
}
impl CENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
CENW::DISABLED => false,
CENW::ENABLED => true,
}
}
}
#[doc = r"Proxy"]
pub struct _CENW<'a> {
w: &'a mut W,
}
impl<'a> _CENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Counter disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(CENW::DISABLED)
}
#[doc = "Counter enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(CENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 0);
self.w.bits |= ((value as u32) & 0x01) << 0;
self.w
}
}
#[doc = "Possible values of the field `UDIS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UDISR {
#[doc = "Update event enabled"]
ENABLED,
#[doc = "Update event disabled"]
DISABLED,
}
impl UDISR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
UDISR::ENABLED => false,
UDISR::DISABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> UDISR {
match value {
false => UDISR::ENABLED,
true => UDISR::DISABLED,
}
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == UDISR::ENABLED
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == UDISR::DISABLED
}
}
#[doc = "Values that can be written to the field `UDIS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UDISW {
#[doc = "Update event enabled"]
ENABLED,
#[doc = "Update event disabled"]
DISABLED,
}
impl UDISW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
UDISW::ENABLED => false,
UDISW::DISABLED => true,
}
}
}
#[doc = r"Proxy"]
pub struct _UDISW<'a> {
w: &'a mut W,
}
impl<'a> _UDISW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UDISW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Update event enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(UDISW::ENABLED)
}
#[doc = "Update event disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(UDISW::DISABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 1);
self.w.bits |= ((value as u32) & 0x01) << 1;
self.w
}
}
#[doc = "Possible values of the field `URS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum URSR {
#[doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request"]
ANYEVENT,
#[doc = "Only counter overflow/underflow generates an update interrupt or DMA request"]
COUNTERONLY,
}
impl URSR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
URSR::ANYEVENT => false,
URSR::COUNTERONLY => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> URSR {
match value {
false => URSR::ANYEVENT,
true => URSR::COUNTERONLY,
}
}
#[doc = "Checks if the value of the field is `ANYEVENT`"]
#[inline(always)]
pub fn is_any_event(&self) -> bool {
*self == URSR::ANYEVENT
}
#[doc = "Checks if the value of the field is `COUNTERONLY`"]
#[inline(always)]
pub fn is_counter_only(&self) -> bool {
*self == URSR::COUNTERONLY
}
}
#[doc = "Values that can be written to the field `URS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum URSW {
#[doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request"]
ANYEVENT,
#[doc = "Only counter overflow/underflow generates an update interrupt or DMA request"]
COUNTERONLY,
}
impl URSW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
URSW::ANYEVENT => false,
URSW::COUNTERONLY => true,
}
}
}
#[doc = r"Proxy"]
pub struct _URSW<'a> {
w: &'a mut W,
}
impl<'a> _URSW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: URSW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request"]
#[inline(always)]
pub fn any_event(self) -> &'a mut W {
self.variant(URSW::ANYEVENT)
}
#[doc = "Only counter overflow/underflow generates an update interrupt or DMA request"]
#[inline(always)]
pub fn counter_only(self) -> &'a mut W {
self.variant(URSW::COUNTERONLY)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 2);
self.w.bits |= ((value as u32) & 0x01) << 2;
self.w
}
}
#[doc = "Possible values of the field `OPM`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum OPMR {
#[doc = "Counter is not stopped at update event"]
DISABLED,
#[doc = "Counter stops counting at the next update event (clearing the CEN bit)"]
ENABLED,
}
impl OPMR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
OPMR::DISABLED => false,
OPMR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> OPMR {
match value {
false => OPMR::DISABLED,
true => OPMR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == OPMR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == OPMR::ENABLED
}
}
#[doc = "Values that can be written to the field `OPM`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum OPMW {
#[doc = "Counter is not stopped at update event"]
DISABLED,
#[doc = "Counter stops counting at the next update event (clearing the CEN bit)"]
ENABLED,
}
impl OPMW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
OPMW::DISABLED => false,
OPMW::ENABLED => true,
}
}
}
#[doc = r"Proxy"]
pub struct _OPMW<'a> {
w: &'a mut W,
}
impl<'a> _OPMW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: OPMW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Counter is not stopped at update event"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(OPMW::DISABLED)
}
#[doc = "Counter stops counting at the next update event (clearing the CEN bit)"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(OPMW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 3);
self.w.bits |= ((value as u32) & 0x01) << 3;
self.w
}
}
#[doc = "Possible values of the field `DIR`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DIRR {
#[doc = "Counter used as upcounter"]
UP,
#[doc = "Counter used as downcounter"]
DOWN,
}
impl DIRR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
DIRR::UP => false,
DIRR::DOWN => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> DIRR {
match value {
false => DIRR::UP,
true => DIRR::DOWN,
}
}
#[doc = "Checks if the value of the field is `UP`"]
#[inline(always)]
pub fn is_up(&self) -> bool {
*self == DIRR::UP
}
#[doc = "Checks if the value of the field is `DOWN`"]
#[inline(always)]
pub fn is_down(&self) -> bool {
*self == DIRR::DOWN
}
}
#[doc = "Values that can be written to the field `DIR`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DIRW {
#[doc = "Counter used as upcounter"]
UP,
#[doc = "Counter used as downcounter"]
DOWN,
}
impl DIRW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
DIRW::UP => false,
DIRW::DOWN => true,
}
}
}
#[doc = r"Proxy"]
pub struct _DIRW<'a> {
w: &'a mut W,
}
impl<'a> _DIRW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DIRW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Counter used as upcounter"]
#[inline(always)]
pub fn up(self) -> &'a mut W {
self.variant(DIRW::UP)
}
#[doc = "Counter used as downcounter"]
#[inline(always)]
pub fn down(self) -> &'a mut W {
self.variant(DIRW::DOWN)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 4);
self.w.bits |= ((value as u32) & 0x01) << 4;
self.w
}
}
#[doc = "Possible values of the field `CMS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CMSR {
#[doc = "The counter counts up or down depending on the direction bit"]
EDGEALIGNED,
#[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down."]
CENTERALIGNED1,
#[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up."]
CENTERALIGNED2,
#[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down."]
CENTERALIGNED3,
}
impl CMSR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
CMSR::EDGEALIGNED => 0,
CMSR::CENTERALIGNED1 => 0x01,
CMSR::CENTERALIGNED2 => 0x02,
CMSR::CENTERALIGNED3 => 0x03,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> CMSR {
match value {
0 => CMSR::EDGEALIGNED,
1 => CMSR::CENTERALIGNED1,
2 => CMSR::CENTERALIGNED2,
3 => CMSR::CENTERALIGNED3,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `EDGEALIGNED`"]
#[inline(always)]
pub fn is_edge_aligned(&self) -> bool {
*self == CMSR::EDGEALIGNED
}
#[doc = "Checks if the value of the field is `CENTERALIGNED1`"]
#[inline(always)]
pub fn is_center_aligned1(&self) -> bool {
*self == CMSR::CENTERALIGNED1
}
#[doc = "Checks if the value of the field is `CENTERALIGNED2`"]
#[inline(always)]
pub fn is_center_aligned2(&self) -> bool {
*self == CMSR::CENTERALIGNED2
}
#[doc = "Checks if the value of the field is `CENTERALIGNED3`"]
#[inline(always)]
pub fn is_center_aligned3(&self) -> bool {
*self == CMSR::CENTERALIGNED3
}
}
#[doc = "Values that can be written to the field `CMS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CMSW {
#[doc = "The counter counts up or down depending on the direction bit"]
EDGEALIGNED,
#[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down."]
CENTERALIGNED1,
#[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up."]
CENTERALIGNED2,
#[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down."]
CENTERALIGNED3,
}
impl CMSW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
CMSW::EDGEALIGNED => 0,
CMSW::CENTERALIGNED1 => 1,
CMSW::CENTERALIGNED2 => 2,
CMSW::CENTERALIGNED3 => 3,
}
}
}
#[doc = r"Proxy"]
pub struct _CMSW<'a> {
w: &'a mut W,
}
impl<'a> _CMSW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CMSW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "The counter counts up or down depending on the direction bit"]
#[inline(always)]
pub fn edge_aligned(self) -> &'a mut W {
self.variant(CMSW::EDGEALIGNED)
}
#[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down."]
#[inline(always)]
pub fn center_aligned1(self) -> &'a mut W {
self.variant(CMSW::CENTERALIGNED1)
}
#[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up."]
#[inline(always)]
pub fn center_aligned2(self) -> &'a mut W {
self.variant(CMSW::CENTERALIGNED2)
}
#[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down."]
#[inline(always)]
pub fn center_aligned3(self) -> &'a mut W {
self.variant(CMSW::CENTERALIGNED3)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x03 << 5);
self.w.bits |= ((value as u32) & 0x03) << 5;
self.w
}
}
#[doc = "Possible values of the field `ARPE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ARPER {
#[doc = "TIMx_APRR register is not buffered"]
DISABLED,
#[doc = "TIMx_APRR register is buffered"]
ENABLED,
}
impl ARPER {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
ARPER::DISABLED => false,
ARPER::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> ARPER {
match value {
false => ARPER::DISABLED,
true => ARPER::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ARPER::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ARPER::ENABLED
}
}
#[doc = "Values that can be written to the field `ARPE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ARPEW {
#[doc = "TIMx_APRR register is not buffered"]
DISABLED,
#[doc = "TIMx_APRR register is buffered"]
ENABLED,
}
impl ARPEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
ARPEW::DISABLED => false,
ARPEW::ENABLED => true,
}
}
}
#[doc = r"Proxy"]
pub struct _ARPEW<'a> {
w: &'a mut W,
}
impl<'a> _ARPEW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ARPEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "TIMx_APRR register is not buffered"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ARPEW::DISABLED)
}
#[doc = "TIMx_APRR register is buffered"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ARPEW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 7);
self.w.bits |= ((value as u32) & 0x01) << 7;
self.w
}
}
#[doc = "Possible values of the field `CKD`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CKDR {
#[doc = "t_DTS = t_CK_INT"]
DIV1,
#[doc = "t_DTS = 2 \u{d7} t_CK_INT"]
DIV2,
#[doc = "t_DTS = 4 \u{d7} t_CK_INT"]
DIV4,
#[doc = r"Reserved"]
_Reserved(u8),
}
impl CKDR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
CKDR::DIV1 => 0,
CKDR::DIV2 => 0x01,
CKDR::DIV4 => 0x02,
CKDR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> CKDR {
match value {
0 => CKDR::DIV1,
1 => CKDR::DIV2,
2 => CKDR::DIV4,
i => CKDR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `DIV1`"]
#[inline(always)]
pub fn is_div1(&self) -> bool {
*self == CKDR::DIV1
}
#[doc = "Checks if the value of the field is `DIV2`"]
#[inline(always)]
pub fn is_div2(&self) -> bool {
*self == CKDR::DIV2
}
#[doc = "Checks if the value of the field is `DIV4`"]
#[inline(always)]
pub fn is_div4(&self) -> bool {
*self == CKDR::DIV4
}
}
#[doc = "Values that can be written to the field `CKD`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CKDW {
#[doc = "t_DTS = t_CK_INT"]
DIV1,
#[doc = "t_DTS = 2 \u{d7} t_CK_INT"]
DIV2,
#[doc = "t_DTS = 4 \u{d7} t_CK_INT"]
DIV4,
}
impl CKDW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
CKDW::DIV1 => 0,
CKDW::DIV2 => 1,
CKDW::DIV4 => 2,
}
}
}
#[doc = r"Proxy"]
pub struct _CKDW<'a> {
w: &'a mut W,
}
impl<'a> _CKDW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CKDW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "t_DTS = t_CK_INT"]
#[inline(always)]
pub fn div1(self) -> &'a mut W {
self.variant(CKDW::DIV1)
}
#[doc = "t_DTS = 2 \u{d7} t_CK_INT"]
#[inline(always)]
pub fn div2(self) -> &'a mut W {
self.variant(CKDW::DIV2)
}
#[doc = "t_DTS = 4 \u{d7} t_CK_INT"]
#[inline(always)]
pub fn div4(self) -> &'a mut W {
self.variant(CKDW::DIV4)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x03 << 8);
self.w.bits |= ((value as u32) & 0x03) << 8;
self.w
}
}
#[doc = r"Value of the field"]
pub struct UIFREMAPR {
bits: bool,
}
impl UIFREMAPR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r"Proxy"]
pub struct _UIFREMAPW<'a> {
w: &'a mut W,
}
impl<'a> _UIFREMAPW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 11);
self.w.bits |= ((value as u32) & 0x01) << 11;
self.w
}
}
impl R {
#[doc = r"Value of the register as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Counter enable"]
#[inline(always)]
pub fn cen(&self) -> CENR {
CENR::_from(((self.bits >> 0) & 0x01) != 0)
}
#[doc = "Bit 1 - Update disable"]
#[inline(always)]
pub fn udis(&self) -> UDISR {
UDISR::_from(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - Update request source"]
#[inline(always)]
pub fn urs(&self) -> URSR {
URSR::_from(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 3 - One-pulse mode"]
#[inline(always)]
pub fn opm(&self) -> OPMR {
OPMR::_from(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 4 - Direction"]
#[inline(always)]
pub fn dir(&self) -> DIRR {
DIRR::_from(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bits 5:6 - Center-aligned mode selection"]
#[inline(always)]
pub fn cms(&self) -> CMSR {
CMSR::_from(((self.bits >> 5) & 0x03) as u8)
}
#[doc = "Bit 7 - Auto-reload preload enable"]
#[inline(always)]
pub fn arpe(&self) -> ARPER {
ARPER::_from(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bits 8:9 - Clock division"]
#[inline(always)]
pub fn ckd(&self) -> CKDR {
CKDR::_from(((self.bits >> 8) & 0x03) as u8)
}
#[doc = "Bit 11 - UIF status bit remapping"]
#[inline(always)]
pub fn uifremap(&self) -> UIFREMAPR {
let bits = ((self.bits >> 11) & 0x01) != 0;
UIFREMAPR { bits }
}
}
impl W {
#[doc = r"Writes raw bits to the register"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Counter enable"]
#[inline(always)]
pub fn cen(&mut self) -> _CENW {
_CENW { w: self }
}
#[doc = "Bit 1 - Update disable"]
#[inline(always)]
pub fn udis(&mut self) -> _UDISW {
_UDISW { w: self }
}
#[doc = "Bit 2 - Update request source"]
#[inline(always)]
pub fn urs(&mut self) -> _URSW {
_URSW { w: self }
}
#[doc = "Bit 3 - One-pulse mode"]
#[inline(always)]
pub fn opm(&mut self) -> _OPMW {
_OPMW { w: self }
}
#[doc = "Bit 4 - Direction"]
#[inline(always)]
pub fn dir(&mut self) -> _DIRW {
_DIRW { w: self }
}
#[doc = "Bits 5:6 - Center-aligned mode selection"]
#[inline(always)]
pub fn cms(&mut self) -> _CMSW {
_CMSW { w: self }
}
#[doc = "Bit 7 - Auto-reload preload enable"]
#[inline(always)]
pub fn arpe(&mut self) -> _ARPEW {
_ARPEW { w: self }
}
#[doc = "Bits 8:9 - Clock division"]
#[inline(always)]
pub fn ckd(&mut self) -> _CKDW {
_CKDW { w: self }
}
#[doc = "Bit 11 - UIF status bit remapping"]
#[inline(always)]
pub fn uifremap(&mut self) -> _UIFREMAPW {
_UIFREMAPW { w: self }
}
}