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#[doc = "Reader of register APB1RSTR"] pub type R = crate::R<u32, super::APB1RSTR>; #[doc = "Writer for register APB1RSTR"] pub type W = crate::W<u32, super::APB1RSTR>; #[doc = "Register APB1RSTR `reset()`'s with value 0"] impl crate::ResetValue for super::APB1RSTR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Timer 2 reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum TIM2RST_A { #[doc = "1: Reset the selected module"] RESET = 1, } impl From<TIM2RST_A> for bool { #[inline(always)] fn from(variant: TIM2RST_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `TIM2RST`"] pub type TIM2RST_R = crate::R<bool, TIM2RST_A>; impl TIM2RST_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> crate::Variant<bool, TIM2RST_A> { use crate::Variant::*; match self.bits { true => Val(TIM2RST_A::RESET), i => Res(i), } } #[doc = "Checks if the value of the field is `RESET`"] #[inline(always)] pub fn is_reset(&self) -> bool { *self == TIM2RST_A::RESET } } #[doc = "Write proxy for field `TIM2RST`"] pub struct TIM2RST_W<'a> { w: &'a mut W, } impl<'a> TIM2RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM2RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Timer 3 reset"] pub type TIM3RST_A = TIM2RST_A; #[doc = "Reader of field `TIM3RST`"] pub type TIM3RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `TIM3RST`"] pub struct TIM3RST_W<'a> { w: &'a mut W, } impl<'a> TIM3RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM3RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Timer 14 reset"] pub type TIM4RST_A = TIM2RST_A; #[doc = "Reader of field `TIM4RST`"] pub type TIM4RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `TIM4RST`"] pub struct TIM4RST_W<'a> { w: &'a mut W, } impl<'a> TIM4RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM4RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Timer 5 reset"] pub type TIM5RST_A = TIM2RST_A; #[doc = "Reader of field `TIM5RST`"] pub type TIM5RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `TIM5RST`"] pub struct TIM5RST_W<'a> { w: &'a mut W, } impl<'a> TIM5RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM5RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Timer 6 reset"] pub type TIM6RST_A = TIM2RST_A; #[doc = "Reader of field `TIM6RST`"] pub type TIM6RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `TIM6RST`"] pub struct TIM6RST_W<'a> { w: &'a mut W, } impl<'a> TIM6RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM6RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Timer 7 reset"] pub type TIM7RST_A = TIM2RST_A; #[doc = "Reader of field `TIM7RST`"] pub type TIM7RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `TIM7RST`"] pub struct TIM7RST_W<'a> { w: &'a mut W, } impl<'a> TIM7RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM7RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Timer 12 reset"] pub type TIM12RST_A = TIM2RST_A; #[doc = "Reader of field `TIM12RST`"] pub type TIM12RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `TIM12RST`"] pub struct TIM12RST_W<'a> { w: &'a mut W, } impl<'a> TIM12RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM12RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); self.w } } #[doc = "Timer 13 reset"] pub type TIM13RST_A = TIM2RST_A; #[doc = "Reader of field `TIM13RST`"] pub type TIM13RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `TIM13RST`"] pub struct TIM13RST_W<'a> { w: &'a mut W, } impl<'a> TIM13RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM13RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); self.w } } #[doc = "Timer 14 reset"] pub type TIM14RST_A = TIM2RST_A; #[doc = "Reader of field `TIM14RST`"] pub type TIM14RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `TIM14RST`"] pub struct TIM14RST_W<'a> { w: &'a mut W, } impl<'a> TIM14RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM14RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Timer 18 reset"] pub type TIM18RST_A = TIM2RST_A; #[doc = "Reader of field `TIM18RST`"] pub type TIM18RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `TIM18RST`"] pub struct TIM18RST_W<'a> { w: &'a mut W, } impl<'a> TIM18RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TIM18RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Window watchdog reset"] pub type WWDGRST_A = TIM2RST_A; #[doc = "Reader of field `WWDGRST`"] pub type WWDGRST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `WWDGRST`"] pub struct WWDGRST_W<'a> { w: &'a mut W, } impl<'a> WWDGRST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: WWDGRST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "SPI2 reset"] pub type SPI2RST_A = TIM2RST_A; #[doc = "Reader of field `SPI2RST`"] pub type SPI2RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `SPI2RST`"] pub struct SPI2RST_W<'a> { w: &'a mut W, } impl<'a> SPI2RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SPI2RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "SPI3 reset"] pub type SPI3RST_A = TIM2RST_A; #[doc = "Reader of field `SPI3RST`"] pub type SPI3RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `SPI3RST`"] pub struct SPI3RST_W<'a> { w: &'a mut W, } impl<'a> SPI3RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SPI3RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); self.w } } #[doc = "USART 2 reset"] pub type USART2RST_A = TIM2RST_A; #[doc = "Reader of field `USART2RST`"] pub type USART2RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `USART2RST`"] pub struct USART2RST_W<'a> { w: &'a mut W, } impl<'a> USART2RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: USART2RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "USART3 reset"] pub type USART3RST_A = TIM2RST_A; #[doc = "Reader of field `USART3RST`"] pub type USART3RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `USART3RST`"] pub struct USART3RST_W<'a> { w: &'a mut W, } impl<'a> USART3RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: USART3RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "I2C1 reset"] pub type I2C1RST_A = TIM2RST_A; #[doc = "Reader of field `I2C1RST`"] pub type I2C1RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `I2C1RST`"] pub struct I2C1RST_W<'a> { w: &'a mut W, } impl<'a> I2C1RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: I2C1RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); self.w } } #[doc = "I2C2 reset"] pub type I2C2RST_A = TIM2RST_A; #[doc = "Reader of field `I2C2RST`"] pub type I2C2RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `I2C2RST`"] pub struct I2C2RST_W<'a> { w: &'a mut W, } impl<'a> I2C2RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: I2C2RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); self.w } } #[doc = "USB reset"] pub type USBRST_A = TIM2RST_A; #[doc = "Reader of field `USBRST`"] pub type USBRST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `USBRST`"] pub struct USBRST_W<'a> { w: &'a mut W, } impl<'a> USBRST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: USBRST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); self.w } } #[doc = "CAN reset"] pub type CANRST_A = TIM2RST_A; #[doc = "Reader of field `CANRST`"] pub type CANRST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `CANRST`"] pub struct CANRST_W<'a> { w: &'a mut W, } impl<'a> CANRST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: CANRST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); self.w } } #[doc = "DAC3 reset"] pub type DAC2RST_A = TIM2RST_A; #[doc = "Reader of field `DAC2RST`"] pub type DAC2RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `DAC2RST`"] pub struct DAC2RST_W<'a> { w: &'a mut W, } impl<'a> DAC2RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: DAC2RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); self.w } } #[doc = "Power interface reset"] pub type PWRRST_A = TIM2RST_A; #[doc = "Reader of field `PWRRST`"] pub type PWRRST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `PWRRST`"] pub struct PWRRST_W<'a> { w: &'a mut W, } impl<'a> PWRRST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: PWRRST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); self.w } } #[doc = "DAC interface reset"] pub type DAC1RST_A = TIM2RST_A; #[doc = "Reader of field `DAC1RST`"] pub type DAC1RST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `DAC1RST`"] pub struct DAC1RST_W<'a> { w: &'a mut W, } impl<'a> DAC1RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: DAC1RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); self.w } } #[doc = "HDMI CEC reset"] pub type CECRST_A = TIM2RST_A; #[doc = "Reader of field `CECRST`"] pub type CECRST_R = crate::R<bool, TIM2RST_A>; #[doc = "Write proxy for field `CECRST`"] pub struct CECRST_W<'a> { w: &'a mut W, } impl<'a> CECRST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: CECRST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(TIM2RST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); self.w } } impl R { #[doc = "Bit 0 - Timer 2 reset"] #[inline(always)] pub fn tim2rst(&self) -> TIM2RST_R { TIM2RST_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Timer 3 reset"] #[inline(always)] pub fn tim3rst(&self) -> TIM3RST_R { TIM3RST_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Timer 14 reset"] #[inline(always)] pub fn tim4rst(&self) -> TIM4RST_R { TIM4RST_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Timer 5 reset"] #[inline(always)] pub fn tim5rst(&self) -> TIM5RST_R { TIM5RST_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Timer 6 reset"] #[inline(always)] pub fn tim6rst(&self) -> TIM6RST_R { TIM6RST_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Timer 7 reset"] #[inline(always)] pub fn tim7rst(&self) -> TIM7RST_R { TIM7RST_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Timer 12 reset"] #[inline(always)] pub fn tim12rst(&self) -> TIM12RST_R { TIM12RST_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Timer 13 reset"] #[inline(always)] pub fn tim13rst(&self) -> TIM13RST_R { TIM13RST_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Timer 14 reset"] #[inline(always)] pub fn tim14rst(&self) -> TIM14RST_R { TIM14RST_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Timer 18 reset"] #[inline(always)] pub fn tim18rst(&self) -> TIM18RST_R { TIM18RST_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 11 - Window watchdog reset"] #[inline(always)] pub fn wwdgrst(&self) -> WWDGRST_R { WWDGRST_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 14 - SPI2 reset"] #[inline(always)] pub fn spi2rst(&self) -> SPI2RST_R { SPI2RST_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - SPI3 reset"] #[inline(always)] pub fn spi3rst(&self) -> SPI3RST_R { SPI3RST_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 17 - USART 2 reset"] #[inline(always)] pub fn usart2rst(&self) -> USART2RST_R { USART2RST_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - USART3 reset"] #[inline(always)] pub fn usart3rst(&self) -> USART3RST_R { USART3RST_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 21 - I2C1 reset"] #[inline(always)] pub fn i2c1rst(&self) -> I2C1RST_R { I2C1RST_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22 - I2C2 reset"] #[inline(always)] pub fn i2c2rst(&self) -> I2C2RST_R { I2C2RST_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 23 - USB reset"] #[inline(always)] pub fn usbrst(&self) -> USBRST_R { USBRST_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 25 - CAN reset"] #[inline(always)] pub fn canrst(&self) -> CANRST_R { CANRST_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26 - DAC3 reset"] #[inline(always)] pub fn dac2rst(&self) -> DAC2RST_R { DAC2RST_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 28 - Power interface reset"] #[inline(always)] pub fn pwrrst(&self) -> PWRRST_R { PWRRST_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 29 - DAC interface reset"] #[inline(always)] pub fn dac1rst(&self) -> DAC1RST_R { DAC1RST_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - HDMI CEC reset"] #[inline(always)] pub fn cecrst(&self) -> CECRST_R { CECRST_R::new(((self.bits >> 30) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Timer 2 reset"] #[inline(always)] pub fn tim2rst(&mut self) -> TIM2RST_W { TIM2RST_W { w: self } } #[doc = "Bit 1 - Timer 3 reset"] #[inline(always)] pub fn tim3rst(&mut self) -> TIM3RST_W { TIM3RST_W { w: self } } #[doc = "Bit 2 - Timer 14 reset"] #[inline(always)] pub fn tim4rst(&mut self) -> TIM4RST_W { TIM4RST_W { w: self } } #[doc = "Bit 3 - Timer 5 reset"] #[inline(always)] pub fn tim5rst(&mut self) -> TIM5RST_W { TIM5RST_W { w: self } } #[doc = "Bit 4 - Timer 6 reset"] #[inline(always)] pub fn tim6rst(&mut self) -> TIM6RST_W { TIM6RST_W { w: self } } #[doc = "Bit 5 - Timer 7 reset"] #[inline(always)] pub fn tim7rst(&mut self) -> TIM7RST_W { TIM7RST_W { w: self } } #[doc = "Bit 6 - Timer 12 reset"] #[inline(always)] pub fn tim12rst(&mut self) -> TIM12RST_W { TIM12RST_W { w: self } } #[doc = "Bit 7 - Timer 13 reset"] #[inline(always)] pub fn tim13rst(&mut self) -> TIM13RST_W { TIM13RST_W { w: self } } #[doc = "Bit 8 - Timer 14 reset"] #[inline(always)] pub fn tim14rst(&mut self) -> TIM14RST_W { TIM14RST_W { w: self } } #[doc = "Bit 9 - Timer 18 reset"] #[inline(always)] pub fn tim18rst(&mut self) -> TIM18RST_W { TIM18RST_W { w: self } } #[doc = "Bit 11 - Window watchdog reset"] #[inline(always)] pub fn wwdgrst(&mut self) -> WWDGRST_W { WWDGRST_W { w: self } } #[doc = "Bit 14 - SPI2 reset"] #[inline(always)] pub fn spi2rst(&mut self) -> SPI2RST_W { SPI2RST_W { w: self } } #[doc = "Bit 15 - SPI3 reset"] #[inline(always)] pub fn spi3rst(&mut self) -> SPI3RST_W { SPI3RST_W { w: self } } #[doc = "Bit 17 - USART 2 reset"] #[inline(always)] pub fn usart2rst(&mut self) -> USART2RST_W { USART2RST_W { w: self } } #[doc = "Bit 18 - USART3 reset"] #[inline(always)] pub fn usart3rst(&mut self) -> USART3RST_W { USART3RST_W { w: self } } #[doc = "Bit 21 - I2C1 reset"] #[inline(always)] pub fn i2c1rst(&mut self) -> I2C1RST_W { I2C1RST_W { w: self } } #[doc = "Bit 22 - I2C2 reset"] #[inline(always)] pub fn i2c2rst(&mut self) -> I2C2RST_W { I2C2RST_W { w: self } } #[doc = "Bit 23 - USB reset"] #[inline(always)] pub fn usbrst(&mut self) -> USBRST_W { USBRST_W { w: self } } #[doc = "Bit 25 - CAN reset"] #[inline(always)] pub fn canrst(&mut self) -> CANRST_W { CANRST_W { w: self } } #[doc = "Bit 26 - DAC3 reset"] #[inline(always)] pub fn dac2rst(&mut self) -> DAC2RST_W { DAC2RST_W { w: self } } #[doc = "Bit 28 - Power interface reset"] #[inline(always)] pub fn pwrrst(&mut self) -> PWRRST_W { PWRRST_W { w: self } } #[doc = "Bit 29 - DAC interface reset"] #[inline(always)] pub fn dac1rst(&mut self) -> DAC1RST_W { DAC1RST_W { w: self } } #[doc = "Bit 30 - HDMI CEC reset"] #[inline(always)] pub fn cecrst(&mut self) -> CECRST_W { CECRST_W { w: self } } }