[−][src]Module stm32f3::stm32f373::usart1::cr2

Control register 2

Structs

ABREN_W	Write proxy for field `ABREN`
ABRMOD_W	Write proxy for field `ABRMOD`
ADDM7_W	Write proxy for field `ADDM7`
ADD_W	Write proxy for field `ADD`
CLKEN_W	Write proxy for field `CLKEN`
CPHA_W	Write proxy for field `CPHA`
CPOL_W	Write proxy for field `CPOL`
DATAINV_W	Write proxy for field `DATAINV`
LBCL_W	Write proxy for field `LBCL`
LBDIE_W	Write proxy for field `LBDIE`
LBDL_W	Write proxy for field `LBDL`
LINEN_W	Write proxy for field `LINEN`
MSBFIRST_W	Write proxy for field `MSBFIRST`
RTOEN_W	Write proxy for field `RTOEN`
RXINV_W	Write proxy for field `RXINV`
STOP_W	Write proxy for field `STOP`
SWAP_W	Write proxy for field `SWAP`
TXINV_W	Write proxy for field `TXINV`

ABREN_A	Auto baud rate enable
ABRMOD_A	Auto baud rate mode
ADDM7_A	7-bit Address Detection/4-bit Address Detection
CLKEN_A	Clock enable
CPHA_A	Clock phase
CPOL_A	Clock polarity
DATAINV_A	Binary data inversion
LBCL_A	Last bit clock pulse
LBDIE_A	LIN break detection interrupt enable
LBDL_A	LIN break detection length
LINEN_A	LIN mode enable
MSBFIRST_A	Most significant bit first
RTOEN_A	Receiver timeout enable
RXINV_A	RX pin active level inversion
STOP_A	STOP bits
SWAP_A	Swap TX/RX pins
TXINV_A	TX pin active level inversion