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#[doc = "Reader of register OPAMP1_CSR"] pub type R = crate::R<u32, super::OPAMP1_CSR>; #[doc = "Writer for register OPAMP1_CSR"] pub type W = crate::W<u32, super::OPAMP1_CSR>; #[doc = "Register OPAMP1_CSR `reset()`'s with value 0"] impl crate::ResetValue for super::OPAMP1_CSR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `OPAMP1EN`"] pub type OPAMP1EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `OPAMP1EN`"] pub struct OPAMP1EN_W<'a> { w: &'a mut W, } impl<'a> OPAMP1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `FORCE_VP`"] pub type FORCE_VP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `FORCE_VP`"] pub struct FORCE_VP_W<'a> { w: &'a mut W, } impl<'a> FORCE_VP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `VP_SEL`"] pub type VP_SEL_R = crate::R<u8, u8>; #[doc = "Write proxy for field `VP_SEL`"] pub struct VP_SEL_W<'a> { w: &'a mut W, } impl<'a> VP_SEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u32) & 0x03) << 2); self.w } } #[doc = "Reader of field `VM_SEL`"] pub type VM_SEL_R = crate::R<u8, u8>; #[doc = "Write proxy for field `VM_SEL`"] pub struct VM_SEL_W<'a> { w: &'a mut W, } impl<'a> VM_SEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 5)) | (((value as u32) & 0x03) << 5); self.w } } #[doc = "Reader of field `TCM_EN`"] pub type TCM_EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TCM_EN`"] pub struct TCM_EN_W<'a> { w: &'a mut W, } impl<'a> TCM_EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); self.w } } #[doc = "Reader of field `VMS_SEL`"] pub type VMS_SEL_R = crate::R<bool, bool>; #[doc = "Write proxy for field `VMS_SEL`"] pub struct VMS_SEL_W<'a> { w: &'a mut W, } impl<'a> VMS_SEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Reader of field `VPS_SEL`"] pub type VPS_SEL_R = crate::R<u8, u8>; #[doc = "Write proxy for field `VPS_SEL`"] pub struct VPS_SEL_W<'a> { w: &'a mut W, } impl<'a> VPS_SEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 9)) | (((value as u32) & 0x03) << 9); self.w } } #[doc = "Reader of field `CALON`"] pub type CALON_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CALON`"] pub struct CALON_W<'a> { w: &'a mut W, } impl<'a> CALON_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "Reader of field `CALSEL`"] pub type CALSEL_R = crate::R<u8, u8>; #[doc = "Write proxy for field `CALSEL`"] pub struct CALSEL_W<'a> { w: &'a mut W, } impl<'a> CALSEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u32) & 0x03) << 12); self.w } } #[doc = "Reader of field `PGA_GAIN`"] pub type PGA_GAIN_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PGA_GAIN`"] pub struct PGA_GAIN_W<'a> { w: &'a mut W, } impl<'a> PGA_GAIN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 14)) | (((value as u32) & 0x0f) << 14); self.w } } #[doc = "Reader of field `USER_TRIM`"] pub type USER_TRIM_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USER_TRIM`"] pub struct USER_TRIM_W<'a> { w: &'a mut W, } impl<'a> USER_TRIM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "Reader of field `TRIMOFFSETP`"] pub type TRIMOFFSETP_R = crate::R<u8, u8>; #[doc = "Write proxy for field `TRIMOFFSETP`"] pub struct TRIMOFFSETP_W<'a> { w: &'a mut W, } impl<'a> TRIMOFFSETP_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 19)) | (((value as u32) & 0x1f) << 19); self.w } } #[doc = "Reader of field `TRIMOFFSETN`"] pub type TRIMOFFSETN_R = crate::R<u8, u8>; #[doc = "Write proxy for field `TRIMOFFSETN`"] pub struct TRIMOFFSETN_W<'a> { w: &'a mut W, } impl<'a> TRIMOFFSETN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 24)) | (((value as u32) & 0x1f) << 24); self.w } } #[doc = "Reader of field `TSTREF`"] pub type TSTREF_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TSTREF`"] pub struct TSTREF_W<'a> { w: &'a mut W, } impl<'a> TSTREF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); self.w } } #[doc = "Reader of field `OUTCAL`"] pub type OUTCAL_R = crate::R<bool, bool>; #[doc = "Reader of field `LOCK`"] pub type LOCK_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LOCK`"] pub struct LOCK_W<'a> { w: &'a mut W, } impl<'a> LOCK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); self.w } } impl R { #[doc = "Bit 0 - OPAMP1 enable"] #[inline(always)] pub fn opamp1en(&self) -> OPAMP1EN_R { OPAMP1EN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - FORCE_VP"] #[inline(always)] pub fn force_vp(&self) -> FORCE_VP_R { FORCE_VP_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bits 2:3 - OPAMP Non inverting input selection"] #[inline(always)] pub fn vp_sel(&self) -> VP_SEL_R { VP_SEL_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 5:6 - OPAMP inverting input selection"] #[inline(always)] pub fn vm_sel(&self) -> VM_SEL_R { VM_SEL_R::new(((self.bits >> 5) & 0x03) as u8) } #[doc = "Bit 7 - Timer controlled Mux mode enable"] #[inline(always)] pub fn tcm_en(&self) -> TCM_EN_R { TCM_EN_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - OPAMP inverting input secondary selection"] #[inline(always)] pub fn vms_sel(&self) -> VMS_SEL_R { VMS_SEL_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 9:10 - OPAMP Non inverting input secondary selection"] #[inline(always)] pub fn vps_sel(&self) -> VPS_SEL_R { VPS_SEL_R::new(((self.bits >> 9) & 0x03) as u8) } #[doc = "Bit 11 - Calibration mode enable"] #[inline(always)] pub fn calon(&self) -> CALON_R { CALON_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bits 12:13 - Calibration selection"] #[inline(always)] pub fn calsel(&self) -> CALSEL_R { CALSEL_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 14:17 - Gain in PGA mode"] #[inline(always)] pub fn pga_gain(&self) -> PGA_GAIN_R { PGA_GAIN_R::new(((self.bits >> 14) & 0x0f) as u8) } #[doc = "Bit 18 - User trimming enable"] #[inline(always)] pub fn user_trim(&self) -> USER_TRIM_R { USER_TRIM_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bits 19:23 - Offset trimming value (PMOS)"] #[inline(always)] pub fn trimoffsetp(&self) -> TRIMOFFSETP_R { TRIMOFFSETP_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 24:28 - Offset trimming value (NMOS)"] #[inline(always)] pub fn trimoffsetn(&self) -> TRIMOFFSETN_R { TRIMOFFSETN_R::new(((self.bits >> 24) & 0x1f) as u8) } #[doc = "Bit 29 - TSTREF"] #[inline(always)] pub fn tstref(&self) -> TSTREF_R { TSTREF_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - OPAMP ouput status flag"] #[inline(always)] pub fn outcal(&self) -> OUTCAL_R { OUTCAL_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - OPAMP lock"] #[inline(always)] pub fn lock(&self) -> LOCK_R { LOCK_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - OPAMP1 enable"] #[inline(always)] pub fn opamp1en(&mut self) -> OPAMP1EN_W { OPAMP1EN_W { w: self } } #[doc = "Bit 1 - FORCE_VP"] #[inline(always)] pub fn force_vp(&mut self) -> FORCE_VP_W { FORCE_VP_W { w: self } } #[doc = "Bits 2:3 - OPAMP Non inverting input selection"] #[inline(always)] pub fn vp_sel(&mut self) -> VP_SEL_W { VP_SEL_W { w: self } } #[doc = "Bits 5:6 - OPAMP inverting input selection"] #[inline(always)] pub fn vm_sel(&mut self) -> VM_SEL_W { VM_SEL_W { w: self } } #[doc = "Bit 7 - Timer controlled Mux mode enable"] #[inline(always)] pub fn tcm_en(&mut self) -> TCM_EN_W { TCM_EN_W { w: self } } #[doc = "Bit 8 - OPAMP inverting input secondary selection"] #[inline(always)] pub fn vms_sel(&mut self) -> VMS_SEL_W { VMS_SEL_W { w: self } } #[doc = "Bits 9:10 - OPAMP Non inverting input secondary selection"] #[inline(always)] pub fn vps_sel(&mut self) -> VPS_SEL_W { VPS_SEL_W { w: self } } #[doc = "Bit 11 - Calibration mode enable"] #[inline(always)] pub fn calon(&mut self) -> CALON_W { CALON_W { w: self } } #[doc = "Bits 12:13 - Calibration selection"] #[inline(always)] pub fn calsel(&mut self) -> CALSEL_W { CALSEL_W { w: self } } #[doc = "Bits 14:17 - Gain in PGA mode"] #[inline(always)] pub fn pga_gain(&mut self) -> PGA_GAIN_W { PGA_GAIN_W { w: self } } #[doc = "Bit 18 - User trimming enable"] #[inline(always)] pub fn user_trim(&mut self) -> USER_TRIM_W { USER_TRIM_W { w: self } } #[doc = "Bits 19:23 - Offset trimming value (PMOS)"] #[inline(always)] pub fn trimoffsetp(&mut self) -> TRIMOFFSETP_W { TRIMOFFSETP_W { w: self } } #[doc = "Bits 24:28 - Offset trimming value (NMOS)"] #[inline(always)] pub fn trimoffsetn(&mut self) -> TRIMOFFSETN_W { TRIMOFFSETN_W { w: self } } #[doc = "Bit 29 - TSTREF"] #[inline(always)] pub fn tstref(&mut self) -> TSTREF_W { TSTREF_W { w: self } } #[doc = "Bit 31 - OPAMP lock"] #[inline(always)] pub fn lock(&mut self) -> LOCK_W { LOCK_W { w: self } } }