Expand description
APB1 peripheral clock enable in low power mode register
Re-exports
pub use TIM2LPEN_A as DACLPEN_A;pub use TIM2LPEN_A as PWRLPEN_A;pub use TIM2LPEN_A as CAN2LPEN_A;pub use TIM2LPEN_A as CAN1LPEN_A;pub use TIM2LPEN_A as I2C3LPEN_A;pub use TIM2LPEN_A as I2C2LPEN_A;pub use TIM2LPEN_A as I2C1LPEN_A;pub use TIM2LPEN_A as UART5LPEN_A;pub use TIM2LPEN_A as UART4LPEN_A;pub use TIM2LPEN_A as USART3LPEN_A;pub use TIM2LPEN_A as USART2LPEN_A;pub use TIM2LPEN_A as SPI3LPEN_A;pub use TIM2LPEN_A as SPI2LPEN_A;pub use TIM2LPEN_A as WWDGLPEN_A;pub use TIM2LPEN_A as TIM14LPEN_A;pub use TIM2LPEN_A as TIM13LPEN_A;pub use TIM2LPEN_A as TIM12LPEN_A;pub use TIM2LPEN_A as TIM7LPEN_A;pub use TIM2LPEN_A as TIM6LPEN_A;pub use TIM2LPEN_A as TIM5LPEN_A;pub use TIM2LPEN_A as TIM4LPEN_A;pub use TIM2LPEN_A as TIM3LPEN_A;pub use TIM2LPEN_R as DACLPEN_R;pub use TIM2LPEN_R as PWRLPEN_R;pub use TIM2LPEN_R as CAN2LPEN_R;pub use TIM2LPEN_R as CAN1LPEN_R;pub use TIM2LPEN_R as I2C3LPEN_R;pub use TIM2LPEN_R as I2C2LPEN_R;pub use TIM2LPEN_R as I2C1LPEN_R;pub use TIM2LPEN_R as UART5LPEN_R;pub use TIM2LPEN_R as UART4LPEN_R;pub use TIM2LPEN_R as USART3LPEN_R;pub use TIM2LPEN_R as USART2LPEN_R;pub use TIM2LPEN_R as SPI3LPEN_R;pub use TIM2LPEN_R as SPI2LPEN_R;pub use TIM2LPEN_R as WWDGLPEN_R;pub use TIM2LPEN_R as TIM14LPEN_R;pub use TIM2LPEN_R as TIM13LPEN_R;pub use TIM2LPEN_R as TIM12LPEN_R;pub use TIM2LPEN_R as TIM7LPEN_R;pub use TIM2LPEN_R as TIM6LPEN_R;pub use TIM2LPEN_R as TIM5LPEN_R;pub use TIM2LPEN_R as TIM4LPEN_R;pub use TIM2LPEN_R as TIM3LPEN_R;pub use TIM2LPEN_W as DACLPEN_W;pub use TIM2LPEN_W as PWRLPEN_W;pub use TIM2LPEN_W as CAN2LPEN_W;pub use TIM2LPEN_W as CAN1LPEN_W;pub use TIM2LPEN_W as I2C3LPEN_W;pub use TIM2LPEN_W as I2C2LPEN_W;pub use TIM2LPEN_W as I2C1LPEN_W;pub use TIM2LPEN_W as UART5LPEN_W;pub use TIM2LPEN_W as UART4LPEN_W;pub use TIM2LPEN_W as USART3LPEN_W;pub use TIM2LPEN_W as USART2LPEN_W;pub use TIM2LPEN_W as SPI3LPEN_W;pub use TIM2LPEN_W as SPI2LPEN_W;pub use TIM2LPEN_W as WWDGLPEN_W;pub use TIM2LPEN_W as TIM14LPEN_W;pub use TIM2LPEN_W as TIM13LPEN_W;pub use TIM2LPEN_W as TIM12LPEN_W;pub use TIM2LPEN_W as TIM7LPEN_W;pub use TIM2LPEN_W as TIM6LPEN_W;pub use TIM2LPEN_W as TIM5LPEN_W;pub use TIM2LPEN_W as TIM4LPEN_W;pub use TIM2LPEN_W as TIM3LPEN_W;Structs
APB1 peripheral clock enable in low power mode register
Register APB1LPENR reader
Register APB1LPENR writer
Enums
TIM2 clock enable during Sleep mode
Type Definitions
Field TIM2LPEN reader - TIM2 clock enable during Sleep mode
Field TIM2LPEN writer - TIM2 clock enable during Sleep mode