Struct stm32f1xx_hal::pac::sdio::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub power: Reg<u32, _POWER>,
    pub clkcr: Reg<u32, _CLKCR>,
    pub arg: Reg<u32, _ARG>,
    pub cmd: Reg<u32, _CMD>,
    pub respcmd: Reg<u32, _RESPCMD>,
    pub respi1: Reg<u32, _RESPI1>,
    pub resp2: Reg<u32, _RESP>,
    pub resp3: Reg<u32, _RESP>,
    pub resp4: Reg<u32, _RESP>,
    pub dtimer: Reg<u32, _DTIMER>,
    pub dlen: Reg<u32, _DLEN>,
    pub dctrl: Reg<u32, _DCTRL>,
    pub dcount: Reg<u32, _DCOUNT>,
    pub sta: Reg<u32, _STA>,
    pub icr: Reg<u32, _ICR>,
    pub mask: Reg<u32, _MASK>,
    pub fifocnt: Reg<u32, _FIFOCNT>,
    pub fifo: Reg<u32, _FIFO>,
    // some fields omitted
}

Register block

Fields

power: Reg<u32, _POWER>

0x00 - Bits 1:0 = PWRCTRL: Power supply control bits

clkcr: Reg<u32, _CLKCR>

0x04 - SDI clock control register (SDIO_CLKCR)

arg: Reg<u32, _ARG>

0x08 - Bits 31:0 = : Command argument

cmd: Reg<u32, _CMD>

0x0c - SDIO command register (SDIO_CMD)

respcmd: Reg<u32, _RESPCMD>

0x10 - SDIO command register

respi1: Reg<u32, _RESPI1>

0x14 - Bits 31:0 = CARDSTATUS1

resp2: Reg<u32, _RESP>

0x18 - Bits 31:0 = CARDSTATUS2

resp3: Reg<u32, _RESP>

0x1c - Bits 31:0 = CARDSTATUS2

resp4: Reg<u32, _RESP>

0x20 - Bits 31:0 = CARDSTATUS2

dtimer: Reg<u32, _DTIMER>

0x24 - Bits 31:0 = DATATIME: Data timeout period

dlen: Reg<u32, _DLEN>

0x28 - Bits 24:0 = DATALENGTH: Data length value

dctrl: Reg<u32, _DCTRL>

0x2c - SDIO data control register (SDIO_DCTRL)

dcount: Reg<u32, _DCOUNT>

0x30 - Bits 24:0 = DATACOUNT: Data count value

sta: Reg<u32, _STA>

0x34 - SDIO status register (SDIO_STA)

icr: Reg<u32, _ICR>

0x38 - SDIO interrupt clear register (SDIO_ICR)

mask: Reg<u32, _MASK>

0x3c - SDIO mask register (SDIO_MASK)

fifocnt: Reg<u32, _FIFOCNT>

0x48 - Bits 23:0 = FIFOCOUNT: Remaining number of words to be written to or read from the FIFO

fifo: Reg<u32, _FIFO>

0x80 - bits 31:0 = FIFOData: Receive and transmit FIFO data