type DHR12LD = Reg<u32, _DHR12LD>;
DUAL DAC 12-bit left aligned data holding register (DAC_DHR12LD), Bits 19:16 Reserved, Bits 3:0 Reserved
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about avaliable fields see dhr12ld module