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#[doc = "Reader of register CR"] pub type R = crate::R<u32, super::CR>; #[doc = "Writer for register CR"] pub type W = crate::W<u32, super::CR>; #[doc = "Register CR `reset()`'s with value 0"] impl crate::ResetValue for super::CR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `DBG_SLEEP`"] pub type DBG_SLEEP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_SLEEP`"] pub struct DBG_SLEEP_W<'a> { w: &'a mut W, } impl<'a> DBG_SLEEP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `DBG_STOP`"] pub type DBG_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_STOP`"] pub struct DBG_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `DBG_STANDBY`"] pub type DBG_STANDBY_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_STANDBY`"] pub struct DBG_STANDBY_W<'a> { w: &'a mut W, } impl<'a> DBG_STANDBY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `TRACE_IOEN`"] pub type TRACE_IOEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TRACE_IOEN`"] pub struct TRACE_IOEN_W<'a> { w: &'a mut W, } impl<'a> TRACE_IOEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Reader of field `TRACE_MODE`"] pub type TRACE_MODE_R = crate::R<u8, u8>; #[doc = "Write proxy for field `TRACE_MODE`"] pub struct TRACE_MODE_W<'a> { w: &'a mut W, } impl<'a> TRACE_MODE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6); self.w } } #[doc = "Reader of field `DBG_IWDG_STOP`"] pub type DBG_IWDG_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_IWDG_STOP`"] pub struct DBG_IWDG_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_IWDG_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Reader of field `DBG_WWDG_STOP`"] pub type DBG_WWDG_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_WWDG_STOP`"] pub struct DBG_WWDG_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_WWDG_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Reader of field `DBG_TIM1_STOP`"] pub type DBG_TIM1_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_TIM1_STOP`"] pub struct DBG_TIM1_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_TIM1_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); self.w } } #[doc = "Reader of field `DBG_TIM2_STOP`"] pub type DBG_TIM2_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_TIM2_STOP`"] pub struct DBG_TIM2_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_TIM2_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "Reader of field `DBG_TIM3_STOP`"] pub type DBG_TIM3_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_TIM3_STOP`"] pub struct DBG_TIM3_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_TIM3_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } #[doc = "Reader of field `DBG_TIM4_STOP`"] pub type DBG_TIM4_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_TIM4_STOP`"] pub struct DBG_TIM4_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_TIM4_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); self.w } } #[doc = "Reader of field `DBG_CAN1_STOP`"] pub type DBG_CAN1_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_CAN1_STOP`"] pub struct DBG_CAN1_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_CAN1_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "Reader of field `DBG_I2C1_SMBUS_TIMEOUT`"] pub type DBG_I2C1_SMBUS_TIMEOUT_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_I2C1_SMBUS_TIMEOUT`"] pub struct DBG_I2C1_SMBUS_TIMEOUT_W<'a> { w: &'a mut W, } impl<'a> DBG_I2C1_SMBUS_TIMEOUT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); self.w } } #[doc = "Reader of field `DBG_I2C2_SMBUS_TIMEOUT`"] pub type DBG_I2C2_SMBUS_TIMEOUT_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_I2C2_SMBUS_TIMEOUT`"] pub struct DBG_I2C2_SMBUS_TIMEOUT_W<'a> { w: &'a mut W, } impl<'a> DBG_I2C2_SMBUS_TIMEOUT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } #[doc = "Reader of field `DBG_TIM8_STOP`"] pub type DBG_TIM8_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_TIM8_STOP`"] pub struct DBG_TIM8_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_TIM8_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Reader of field `DBG_TIM5_STOP`"] pub type DBG_TIM5_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_TIM5_STOP`"] pub struct DBG_TIM5_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_TIM5_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "Reader of field `DBG_TIM6_STOP`"] pub type DBG_TIM6_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_TIM6_STOP`"] pub struct DBG_TIM6_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_TIM6_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); self.w } } #[doc = "Reader of field `DBG_TIM7_STOP`"] pub type DBG_TIM7_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_TIM7_STOP`"] pub struct DBG_TIM7_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_TIM7_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); self.w } } #[doc = "Reader of field `DBG_CAN2_STOP`"] pub type DBG_CAN2_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBG_CAN2_STOP`"] pub struct DBG_CAN2_STOP_W<'a> { w: &'a mut W, } impl<'a> DBG_CAN2_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); self.w } } impl R { #[doc = "Bit 0 - DBG_SLEEP"] #[inline(always)] pub fn dbg_sleep(&self) -> DBG_SLEEP_R { DBG_SLEEP_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - DBG_STOP"] #[inline(always)] pub fn dbg_stop(&self) -> DBG_STOP_R { DBG_STOP_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - DBG_STANDBY"] #[inline(always)] pub fn dbg_standby(&self) -> DBG_STANDBY_R { DBG_STANDBY_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 5 - TRACE_IOEN"] #[inline(always)] pub fn trace_ioen(&self) -> TRACE_IOEN_R { TRACE_IOEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bits 6:7 - TRACE_MODE"] #[inline(always)] pub fn trace_mode(&self) -> TRACE_MODE_R { TRACE_MODE_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bit 8 - DBG_IWDG_STOP"] #[inline(always)] pub fn dbg_iwdg_stop(&self) -> DBG_IWDG_STOP_R { DBG_IWDG_STOP_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - DBG_WWDG_STOP"] #[inline(always)] pub fn dbg_wwdg_stop(&self) -> DBG_WWDG_STOP_R { DBG_WWDG_STOP_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - DBG_TIM1_STOP"] #[inline(always)] pub fn dbg_tim1_stop(&self) -> DBG_TIM1_STOP_R { DBG_TIM1_STOP_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - DBG_TIM2_STOP"] #[inline(always)] pub fn dbg_tim2_stop(&self) -> DBG_TIM2_STOP_R { DBG_TIM2_STOP_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - DBG_TIM3_STOP"] #[inline(always)] pub fn dbg_tim3_stop(&self) -> DBG_TIM3_STOP_R { DBG_TIM3_STOP_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - DBG_TIM4_STOP"] #[inline(always)] pub fn dbg_tim4_stop(&self) -> DBG_TIM4_STOP_R { DBG_TIM4_STOP_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - DBG_CAN1_STOP"] #[inline(always)] pub fn dbg_can1_stop(&self) -> DBG_CAN1_STOP_R { DBG_CAN1_STOP_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - DBG_I2C1_SMBUS_TIMEOUT"] #[inline(always)] pub fn dbg_i2c1_smbus_timeout(&self) -> DBG_I2C1_SMBUS_TIMEOUT_R { DBG_I2C1_SMBUS_TIMEOUT_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16 - DBG_I2C2_SMBUS_TIMEOUT"] #[inline(always)] pub fn dbg_i2c2_smbus_timeout(&self) -> DBG_I2C2_SMBUS_TIMEOUT_R { DBG_I2C2_SMBUS_TIMEOUT_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - DBG_TIM8_STOP"] #[inline(always)] pub fn dbg_tim8_stop(&self) -> DBG_TIM8_STOP_R { DBG_TIM8_STOP_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - DBG_TIM5_STOP"] #[inline(always)] pub fn dbg_tim5_stop(&self) -> DBG_TIM5_STOP_R { DBG_TIM5_STOP_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - DBG_TIM6_STOP"] #[inline(always)] pub fn dbg_tim6_stop(&self) -> DBG_TIM6_STOP_R { DBG_TIM6_STOP_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20 - DBG_TIM7_STOP"] #[inline(always)] pub fn dbg_tim7_stop(&self) -> DBG_TIM7_STOP_R { DBG_TIM7_STOP_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21 - DBG_CAN2_STOP"] #[inline(always)] pub fn dbg_can2_stop(&self) -> DBG_CAN2_STOP_R { DBG_CAN2_STOP_R::new(((self.bits >> 21) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - DBG_SLEEP"] #[inline(always)] pub fn dbg_sleep(&mut self) -> DBG_SLEEP_W { DBG_SLEEP_W { w: self } } #[doc = "Bit 1 - DBG_STOP"] #[inline(always)] pub fn dbg_stop(&mut self) -> DBG_STOP_W { DBG_STOP_W { w: self } } #[doc = "Bit 2 - DBG_STANDBY"] #[inline(always)] pub fn dbg_standby(&mut self) -> DBG_STANDBY_W { DBG_STANDBY_W { w: self } } #[doc = "Bit 5 - TRACE_IOEN"] #[inline(always)] pub fn trace_ioen(&mut self) -> TRACE_IOEN_W { TRACE_IOEN_W { w: self } } #[doc = "Bits 6:7 - TRACE_MODE"] #[inline(always)] pub fn trace_mode(&mut self) -> TRACE_MODE_W { TRACE_MODE_W { w: self } } #[doc = "Bit 8 - DBG_IWDG_STOP"] #[inline(always)] pub fn dbg_iwdg_stop(&mut self) -> DBG_IWDG_STOP_W { DBG_IWDG_STOP_W { w: self } } #[doc = "Bit 9 - DBG_WWDG_STOP"] #[inline(always)] pub fn dbg_wwdg_stop(&mut self) -> DBG_WWDG_STOP_W { DBG_WWDG_STOP_W { w: self } } #[doc = "Bit 10 - DBG_TIM1_STOP"] #[inline(always)] pub fn dbg_tim1_stop(&mut self) -> DBG_TIM1_STOP_W { DBG_TIM1_STOP_W { w: self } } #[doc = "Bit 11 - DBG_TIM2_STOP"] #[inline(always)] pub fn dbg_tim2_stop(&mut self) -> DBG_TIM2_STOP_W { DBG_TIM2_STOP_W { w: self } } #[doc = "Bit 12 - DBG_TIM3_STOP"] #[inline(always)] pub fn dbg_tim3_stop(&mut self) -> DBG_TIM3_STOP_W { DBG_TIM3_STOP_W { w: self } } #[doc = "Bit 13 - DBG_TIM4_STOP"] #[inline(always)] pub fn dbg_tim4_stop(&mut self) -> DBG_TIM4_STOP_W { DBG_TIM4_STOP_W { w: self } } #[doc = "Bit 14 - DBG_CAN1_STOP"] #[inline(always)] pub fn dbg_can1_stop(&mut self) -> DBG_CAN1_STOP_W { DBG_CAN1_STOP_W { w: self } } #[doc = "Bit 15 - DBG_I2C1_SMBUS_TIMEOUT"] #[inline(always)] pub fn dbg_i2c1_smbus_timeout(&mut self) -> DBG_I2C1_SMBUS_TIMEOUT_W { DBG_I2C1_SMBUS_TIMEOUT_W { w: self } } #[doc = "Bit 16 - DBG_I2C2_SMBUS_TIMEOUT"] #[inline(always)] pub fn dbg_i2c2_smbus_timeout(&mut self) -> DBG_I2C2_SMBUS_TIMEOUT_W { DBG_I2C2_SMBUS_TIMEOUT_W { w: self } } #[doc = "Bit 17 - DBG_TIM8_STOP"] #[inline(always)] pub fn dbg_tim8_stop(&mut self) -> DBG_TIM8_STOP_W { DBG_TIM8_STOP_W { w: self } } #[doc = "Bit 18 - DBG_TIM5_STOP"] #[inline(always)] pub fn dbg_tim5_stop(&mut self) -> DBG_TIM5_STOP_W { DBG_TIM5_STOP_W { w: self } } #[doc = "Bit 19 - DBG_TIM6_STOP"] #[inline(always)] pub fn dbg_tim6_stop(&mut self) -> DBG_TIM6_STOP_W { DBG_TIM6_STOP_W { w: self } } #[doc = "Bit 20 - DBG_TIM7_STOP"] #[inline(always)] pub fn dbg_tim7_stop(&mut self) -> DBG_TIM7_STOP_W { DBG_TIM7_STOP_W { w: self } } #[doc = "Bit 21 - DBG_CAN2_STOP"] #[inline(always)] pub fn dbg_can2_stop(&mut self) -> DBG_CAN2_STOP_W { DBG_CAN2_STOP_W { w: self } } }