stm32f1_staging/stm32f100/tim15/
dier.rs

1///Register `DIER` reader
2pub type R = crate::R<DIERrs>;
3///Register `DIER` writer
4pub type W = crate::W<DIERrs>;
5/**Update interrupt enable
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum UIE {
11    ///0: Update interrupt disabled
12    Disabled = 0,
13    ///1: Update interrupt enabled
14    Enabled = 1,
15}
16impl From<UIE> for bool {
17    #[inline(always)]
18    fn from(variant: UIE) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `UIE` reader - Update interrupt enable
23pub type UIE_R = crate::BitReader<UIE>;
24impl UIE_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> UIE {
28        match self.bits {
29            false => UIE::Disabled,
30            true => UIE::Enabled,
31        }
32    }
33    ///Update interrupt disabled
34    #[inline(always)]
35    pub fn is_disabled(&self) -> bool {
36        *self == UIE::Disabled
37    }
38    ///Update interrupt enabled
39    #[inline(always)]
40    pub fn is_enabled(&self) -> bool {
41        *self == UIE::Enabled
42    }
43}
44///Field `UIE` writer - Update interrupt enable
45pub type UIE_W<'a, REG> = crate::BitWriter<'a, REG, UIE>;
46impl<'a, REG> UIE_W<'a, REG>
47where
48    REG: crate::Writable + crate::RegisterSpec,
49{
50    ///Update interrupt disabled
51    #[inline(always)]
52    pub fn disabled(self) -> &'a mut crate::W<REG> {
53        self.variant(UIE::Disabled)
54    }
55    ///Update interrupt enabled
56    #[inline(always)]
57    pub fn enabled(self) -> &'a mut crate::W<REG> {
58        self.variant(UIE::Enabled)
59    }
60}
61/**Capture/Compare %s interrupt enable
62
63Value on reset: 0*/
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum CC1IE {
67    ///0: CCx interrupt disabled
68    Disabled = 0,
69    ///1: CCx interrupt enabled
70    Enabled = 1,
71}
72impl From<CC1IE> for bool {
73    #[inline(always)]
74    fn from(variant: CC1IE) -> Self {
75        variant as u8 != 0
76    }
77}
78///Field `CCIE(1-2)` reader - Capture/Compare %s interrupt enable
79pub type CCIE_R = crate::BitReader<CC1IE>;
80impl CCIE_R {
81    ///Get enumerated values variant
82    #[inline(always)]
83    pub const fn variant(&self) -> CC1IE {
84        match self.bits {
85            false => CC1IE::Disabled,
86            true => CC1IE::Enabled,
87        }
88    }
89    ///CCx interrupt disabled
90    #[inline(always)]
91    pub fn is_disabled(&self) -> bool {
92        *self == CC1IE::Disabled
93    }
94    ///CCx interrupt enabled
95    #[inline(always)]
96    pub fn is_enabled(&self) -> bool {
97        *self == CC1IE::Enabled
98    }
99}
100///Field `CCIE(1-2)` writer - Capture/Compare %s interrupt enable
101pub type CCIE_W<'a, REG> = crate::BitWriter<'a, REG, CC1IE>;
102impl<'a, REG> CCIE_W<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    ///CCx interrupt disabled
107    #[inline(always)]
108    pub fn disabled(self) -> &'a mut crate::W<REG> {
109        self.variant(CC1IE::Disabled)
110    }
111    ///CCx interrupt enabled
112    #[inline(always)]
113    pub fn enabled(self) -> &'a mut crate::W<REG> {
114        self.variant(CC1IE::Enabled)
115    }
116}
117/**COM interrupt enable
118
119Value on reset: 0*/
120#[cfg_attr(feature = "defmt", derive(defmt::Format))]
121#[derive(Clone, Copy, Debug, PartialEq, Eq)]
122pub enum COMIE {
123    ///0: COM interrupt disabled
124    Disabled = 0,
125    ///1: COM interrupt enabled
126    Enabled = 1,
127}
128impl From<COMIE> for bool {
129    #[inline(always)]
130    fn from(variant: COMIE) -> Self {
131        variant as u8 != 0
132    }
133}
134///Field `COMIE` reader - COM interrupt enable
135pub type COMIE_R = crate::BitReader<COMIE>;
136impl COMIE_R {
137    ///Get enumerated values variant
138    #[inline(always)]
139    pub const fn variant(&self) -> COMIE {
140        match self.bits {
141            false => COMIE::Disabled,
142            true => COMIE::Enabled,
143        }
144    }
145    ///COM interrupt disabled
146    #[inline(always)]
147    pub fn is_disabled(&self) -> bool {
148        *self == COMIE::Disabled
149    }
150    ///COM interrupt enabled
151    #[inline(always)]
152    pub fn is_enabled(&self) -> bool {
153        *self == COMIE::Enabled
154    }
155}
156///Field `COMIE` writer - COM interrupt enable
157pub type COMIE_W<'a, REG> = crate::BitWriter<'a, REG, COMIE>;
158impl<'a, REG> COMIE_W<'a, REG>
159where
160    REG: crate::Writable + crate::RegisterSpec,
161{
162    ///COM interrupt disabled
163    #[inline(always)]
164    pub fn disabled(self) -> &'a mut crate::W<REG> {
165        self.variant(COMIE::Disabled)
166    }
167    ///COM interrupt enabled
168    #[inline(always)]
169    pub fn enabled(self) -> &'a mut crate::W<REG> {
170        self.variant(COMIE::Enabled)
171    }
172}
173/**Trigger interrupt enable
174
175Value on reset: 0*/
176#[cfg_attr(feature = "defmt", derive(defmt::Format))]
177#[derive(Clone, Copy, Debug, PartialEq, Eq)]
178pub enum TIE {
179    ///0: Trigger interrupt disabled
180    Disabled = 0,
181    ///1: Trigger interrupt enabled
182    Enabled = 1,
183}
184impl From<TIE> for bool {
185    #[inline(always)]
186    fn from(variant: TIE) -> Self {
187        variant as u8 != 0
188    }
189}
190///Field `TIE` reader - Trigger interrupt enable
191pub type TIE_R = crate::BitReader<TIE>;
192impl TIE_R {
193    ///Get enumerated values variant
194    #[inline(always)]
195    pub const fn variant(&self) -> TIE {
196        match self.bits {
197            false => TIE::Disabled,
198            true => TIE::Enabled,
199        }
200    }
201    ///Trigger interrupt disabled
202    #[inline(always)]
203    pub fn is_disabled(&self) -> bool {
204        *self == TIE::Disabled
205    }
206    ///Trigger interrupt enabled
207    #[inline(always)]
208    pub fn is_enabled(&self) -> bool {
209        *self == TIE::Enabled
210    }
211}
212///Field `TIE` writer - Trigger interrupt enable
213pub type TIE_W<'a, REG> = crate::BitWriter<'a, REG, TIE>;
214impl<'a, REG> TIE_W<'a, REG>
215where
216    REG: crate::Writable + crate::RegisterSpec,
217{
218    ///Trigger interrupt disabled
219    #[inline(always)]
220    pub fn disabled(self) -> &'a mut crate::W<REG> {
221        self.variant(TIE::Disabled)
222    }
223    ///Trigger interrupt enabled
224    #[inline(always)]
225    pub fn enabled(self) -> &'a mut crate::W<REG> {
226        self.variant(TIE::Enabled)
227    }
228}
229/**Break interrupt enable
230
231Value on reset: 0*/
232#[cfg_attr(feature = "defmt", derive(defmt::Format))]
233#[derive(Clone, Copy, Debug, PartialEq, Eq)]
234pub enum BIE {
235    ///0: Break interrupt disabled
236    Disabled = 0,
237    ///1: Break interrupt enabled
238    Enabled = 1,
239}
240impl From<BIE> for bool {
241    #[inline(always)]
242    fn from(variant: BIE) -> Self {
243        variant as u8 != 0
244    }
245}
246///Field `BIE` reader - Break interrupt enable
247pub type BIE_R = crate::BitReader<BIE>;
248impl BIE_R {
249    ///Get enumerated values variant
250    #[inline(always)]
251    pub const fn variant(&self) -> BIE {
252        match self.bits {
253            false => BIE::Disabled,
254            true => BIE::Enabled,
255        }
256    }
257    ///Break interrupt disabled
258    #[inline(always)]
259    pub fn is_disabled(&self) -> bool {
260        *self == BIE::Disabled
261    }
262    ///Break interrupt enabled
263    #[inline(always)]
264    pub fn is_enabled(&self) -> bool {
265        *self == BIE::Enabled
266    }
267}
268///Field `BIE` writer - Break interrupt enable
269pub type BIE_W<'a, REG> = crate::BitWriter<'a, REG, BIE>;
270impl<'a, REG> BIE_W<'a, REG>
271where
272    REG: crate::Writable + crate::RegisterSpec,
273{
274    ///Break interrupt disabled
275    #[inline(always)]
276    pub fn disabled(self) -> &'a mut crate::W<REG> {
277        self.variant(BIE::Disabled)
278    }
279    ///Break interrupt enabled
280    #[inline(always)]
281    pub fn enabled(self) -> &'a mut crate::W<REG> {
282        self.variant(BIE::Enabled)
283    }
284}
285/**Update DMA request enable
286
287Value on reset: 0*/
288#[cfg_attr(feature = "defmt", derive(defmt::Format))]
289#[derive(Clone, Copy, Debug, PartialEq, Eq)]
290pub enum UDE {
291    ///0: Update DMA request disabled
292    Disabled = 0,
293    ///1: Update DMA request enabled
294    Enabled = 1,
295}
296impl From<UDE> for bool {
297    #[inline(always)]
298    fn from(variant: UDE) -> Self {
299        variant as u8 != 0
300    }
301}
302///Field `UDE` reader - Update DMA request enable
303pub type UDE_R = crate::BitReader<UDE>;
304impl UDE_R {
305    ///Get enumerated values variant
306    #[inline(always)]
307    pub const fn variant(&self) -> UDE {
308        match self.bits {
309            false => UDE::Disabled,
310            true => UDE::Enabled,
311        }
312    }
313    ///Update DMA request disabled
314    #[inline(always)]
315    pub fn is_disabled(&self) -> bool {
316        *self == UDE::Disabled
317    }
318    ///Update DMA request enabled
319    #[inline(always)]
320    pub fn is_enabled(&self) -> bool {
321        *self == UDE::Enabled
322    }
323}
324///Field `UDE` writer - Update DMA request enable
325pub type UDE_W<'a, REG> = crate::BitWriter<'a, REG, UDE>;
326impl<'a, REG> UDE_W<'a, REG>
327where
328    REG: crate::Writable + crate::RegisterSpec,
329{
330    ///Update DMA request disabled
331    #[inline(always)]
332    pub fn disabled(self) -> &'a mut crate::W<REG> {
333        self.variant(UDE::Disabled)
334    }
335    ///Update DMA request enabled
336    #[inline(always)]
337    pub fn enabled(self) -> &'a mut crate::W<REG> {
338        self.variant(UDE::Enabled)
339    }
340}
341/**Capture/Compare %s DMA request enable
342
343Value on reset: 0*/
344#[cfg_attr(feature = "defmt", derive(defmt::Format))]
345#[derive(Clone, Copy, Debug, PartialEq, Eq)]
346pub enum CC1DE {
347    ///0: CCx DMA request disabled
348    Disabled = 0,
349    ///1: CCx DMA request enabled
350    Enabled = 1,
351}
352impl From<CC1DE> for bool {
353    #[inline(always)]
354    fn from(variant: CC1DE) -> Self {
355        variant as u8 != 0
356    }
357}
358///Field `CCDE(1-2)` reader - Capture/Compare %s DMA request enable
359pub type CCDE_R = crate::BitReader<CC1DE>;
360impl CCDE_R {
361    ///Get enumerated values variant
362    #[inline(always)]
363    pub const fn variant(&self) -> CC1DE {
364        match self.bits {
365            false => CC1DE::Disabled,
366            true => CC1DE::Enabled,
367        }
368    }
369    ///CCx DMA request disabled
370    #[inline(always)]
371    pub fn is_disabled(&self) -> bool {
372        *self == CC1DE::Disabled
373    }
374    ///CCx DMA request enabled
375    #[inline(always)]
376    pub fn is_enabled(&self) -> bool {
377        *self == CC1DE::Enabled
378    }
379}
380///Field `CCDE(1-2)` writer - Capture/Compare %s DMA request enable
381pub type CCDE_W<'a, REG> = crate::BitWriter<'a, REG, CC1DE>;
382impl<'a, REG> CCDE_W<'a, REG>
383where
384    REG: crate::Writable + crate::RegisterSpec,
385{
386    ///CCx DMA request disabled
387    #[inline(always)]
388    pub fn disabled(self) -> &'a mut crate::W<REG> {
389        self.variant(CC1DE::Disabled)
390    }
391    ///CCx DMA request enabled
392    #[inline(always)]
393    pub fn enabled(self) -> &'a mut crate::W<REG> {
394        self.variant(CC1DE::Enabled)
395    }
396}
397/**Trigger DMA request enable
398
399Value on reset: 0*/
400#[cfg_attr(feature = "defmt", derive(defmt::Format))]
401#[derive(Clone, Copy, Debug, PartialEq, Eq)]
402pub enum TDE {
403    ///0: Trigger DMA request disabled
404    Disabled = 0,
405    ///1: Trigger DMA request enabled
406    Enabled = 1,
407}
408impl From<TDE> for bool {
409    #[inline(always)]
410    fn from(variant: TDE) -> Self {
411        variant as u8 != 0
412    }
413}
414///Field `TDE` reader - Trigger DMA request enable
415pub type TDE_R = crate::BitReader<TDE>;
416impl TDE_R {
417    ///Get enumerated values variant
418    #[inline(always)]
419    pub const fn variant(&self) -> TDE {
420        match self.bits {
421            false => TDE::Disabled,
422            true => TDE::Enabled,
423        }
424    }
425    ///Trigger DMA request disabled
426    #[inline(always)]
427    pub fn is_disabled(&self) -> bool {
428        *self == TDE::Disabled
429    }
430    ///Trigger DMA request enabled
431    #[inline(always)]
432    pub fn is_enabled(&self) -> bool {
433        *self == TDE::Enabled
434    }
435}
436///Field `TDE` writer - Trigger DMA request enable
437pub type TDE_W<'a, REG> = crate::BitWriter<'a, REG, TDE>;
438impl<'a, REG> TDE_W<'a, REG>
439where
440    REG: crate::Writable + crate::RegisterSpec,
441{
442    ///Trigger DMA request disabled
443    #[inline(always)]
444    pub fn disabled(self) -> &'a mut crate::W<REG> {
445        self.variant(TDE::Disabled)
446    }
447    ///Trigger DMA request enabled
448    #[inline(always)]
449    pub fn enabled(self) -> &'a mut crate::W<REG> {
450        self.variant(TDE::Enabled)
451    }
452}
453impl R {
454    ///Bit 0 - Update interrupt enable
455    #[inline(always)]
456    pub fn uie(&self) -> UIE_R {
457        UIE_R::new((self.bits & 1) != 0)
458    }
459    ///Capture/Compare (1-2) interrupt enable
460    ///
461    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1IE` field.</div>
462    #[inline(always)]
463    pub fn ccie(&self, n: u8) -> CCIE_R {
464        #[allow(clippy::no_effect)] [(); 2][n as usize];
465        CCIE_R::new(((self.bits >> (n + 1)) & 1) != 0)
466    }
467    ///Iterator for array of:
468    ///Capture/Compare (1-2) interrupt enable
469    #[inline(always)]
470    pub fn ccie_iter(&self) -> impl Iterator<Item = CCIE_R> + '_ {
471        (0..2).map(move |n| CCIE_R::new(((self.bits >> (n + 1)) & 1) != 0))
472    }
473    ///Bit 1 - Capture/Compare 1 interrupt enable
474    #[inline(always)]
475    pub fn cc1ie(&self) -> CCIE_R {
476        CCIE_R::new(((self.bits >> 1) & 1) != 0)
477    }
478    ///Bit 2 - Capture/Compare 2 interrupt enable
479    #[inline(always)]
480    pub fn cc2ie(&self) -> CCIE_R {
481        CCIE_R::new(((self.bits >> 2) & 1) != 0)
482    }
483    ///Bit 5 - COM interrupt enable
484    #[inline(always)]
485    pub fn comie(&self) -> COMIE_R {
486        COMIE_R::new(((self.bits >> 5) & 1) != 0)
487    }
488    ///Bit 6 - Trigger interrupt enable
489    #[inline(always)]
490    pub fn tie(&self) -> TIE_R {
491        TIE_R::new(((self.bits >> 6) & 1) != 0)
492    }
493    ///Bit 7 - Break interrupt enable
494    #[inline(always)]
495    pub fn bie(&self) -> BIE_R {
496        BIE_R::new(((self.bits >> 7) & 1) != 0)
497    }
498    ///Bit 8 - Update DMA request enable
499    #[inline(always)]
500    pub fn ude(&self) -> UDE_R {
501        UDE_R::new(((self.bits >> 8) & 1) != 0)
502    }
503    ///Capture/Compare (1-2) DMA request enable
504    ///
505    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1DE` field.</div>
506    #[inline(always)]
507    pub fn ccde(&self, n: u8) -> CCDE_R {
508        #[allow(clippy::no_effect)] [(); 2][n as usize];
509        CCDE_R::new(((self.bits >> (n + 9)) & 1) != 0)
510    }
511    ///Iterator for array of:
512    ///Capture/Compare (1-2) DMA request enable
513    #[inline(always)]
514    pub fn ccde_iter(&self) -> impl Iterator<Item = CCDE_R> + '_ {
515        (0..2).map(move |n| CCDE_R::new(((self.bits >> (n + 9)) & 1) != 0))
516    }
517    ///Bit 9 - Capture/Compare 1 DMA request enable
518    #[inline(always)]
519    pub fn cc1de(&self) -> CCDE_R {
520        CCDE_R::new(((self.bits >> 9) & 1) != 0)
521    }
522    ///Bit 10 - Capture/Compare 2 DMA request enable
523    #[inline(always)]
524    pub fn cc2de(&self) -> CCDE_R {
525        CCDE_R::new(((self.bits >> 10) & 1) != 0)
526    }
527    ///Bit 14 - Trigger DMA request enable
528    #[inline(always)]
529    pub fn tde(&self) -> TDE_R {
530        TDE_R::new(((self.bits >> 14) & 1) != 0)
531    }
532}
533impl core::fmt::Debug for R {
534    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
535        f.debug_struct("DIER")
536            .field("tde", &self.tde())
537            .field("cc1de", &self.cc1de())
538            .field("cc2de", &self.cc2de())
539            .field("ude", &self.ude())
540            .field("bie", &self.bie())
541            .field("tie", &self.tie())
542            .field("comie", &self.comie())
543            .field("cc1ie", &self.cc1ie())
544            .field("cc2ie", &self.cc2ie())
545            .field("uie", &self.uie())
546            .finish()
547    }
548}
549impl W {
550    ///Bit 0 - Update interrupt enable
551    #[inline(always)]
552    pub fn uie(&mut self) -> UIE_W<DIERrs> {
553        UIE_W::new(self, 0)
554    }
555    ///Capture/Compare (1-2) interrupt enable
556    ///
557    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1IE` field.</div>
558    #[inline(always)]
559    pub fn ccie(&mut self, n: u8) -> CCIE_W<DIERrs> {
560        #[allow(clippy::no_effect)] [(); 2][n as usize];
561        CCIE_W::new(self, n + 1)
562    }
563    ///Bit 1 - Capture/Compare 1 interrupt enable
564    #[inline(always)]
565    pub fn cc1ie(&mut self) -> CCIE_W<DIERrs> {
566        CCIE_W::new(self, 1)
567    }
568    ///Bit 2 - Capture/Compare 2 interrupt enable
569    #[inline(always)]
570    pub fn cc2ie(&mut self) -> CCIE_W<DIERrs> {
571        CCIE_W::new(self, 2)
572    }
573    ///Bit 5 - COM interrupt enable
574    #[inline(always)]
575    pub fn comie(&mut self) -> COMIE_W<DIERrs> {
576        COMIE_W::new(self, 5)
577    }
578    ///Bit 6 - Trigger interrupt enable
579    #[inline(always)]
580    pub fn tie(&mut self) -> TIE_W<DIERrs> {
581        TIE_W::new(self, 6)
582    }
583    ///Bit 7 - Break interrupt enable
584    #[inline(always)]
585    pub fn bie(&mut self) -> BIE_W<DIERrs> {
586        BIE_W::new(self, 7)
587    }
588    ///Bit 8 - Update DMA request enable
589    #[inline(always)]
590    pub fn ude(&mut self) -> UDE_W<DIERrs> {
591        UDE_W::new(self, 8)
592    }
593    ///Capture/Compare (1-2) DMA request enable
594    ///
595    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1DE` field.</div>
596    #[inline(always)]
597    pub fn ccde(&mut self, n: u8) -> CCDE_W<DIERrs> {
598        #[allow(clippy::no_effect)] [(); 2][n as usize];
599        CCDE_W::new(self, n + 9)
600    }
601    ///Bit 9 - Capture/Compare 1 DMA request enable
602    #[inline(always)]
603    pub fn cc1de(&mut self) -> CCDE_W<DIERrs> {
604        CCDE_W::new(self, 9)
605    }
606    ///Bit 10 - Capture/Compare 2 DMA request enable
607    #[inline(always)]
608    pub fn cc2de(&mut self) -> CCDE_W<DIERrs> {
609        CCDE_W::new(self, 10)
610    }
611    ///Bit 14 - Trigger DMA request enable
612    #[inline(always)]
613    pub fn tde(&mut self) -> TDE_W<DIERrs> {
614        TDE_W::new(self, 14)
615    }
616}
617/**DMA/Interrupt enable register
618
619You can [`read`](crate::Reg::read) this register and get [`dier::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dier::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
620
621See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F100.html#TIM15:DIER)*/
622pub struct DIERrs;
623impl crate::RegisterSpec for DIERrs {
624    type Ux = u32;
625}
626///`read()` method returns [`dier::R`](R) reader structure
627impl crate::Readable for DIERrs {}
628///`write(|w| ..)` method takes [`dier::W`](W) writer structure
629impl crate::Writable for DIERrs {
630    type Safety = crate::Unsafe;
631}
632///`reset()` method sets DIER to value 0
633impl crate::Resettable for DIERrs {}
stm32f1_staging/stm32f100/tim15/dier.rs

stm32f1_staging/stm32f100/tim15/
dier.rs
