stm32f1_staging/stm32f100/cec/
esr.rs

1///Register `ESR` reader
2pub type R = crate::R<ESRrs>;
3///Field `BTE` reader - Bit timing error
4pub type BTE_R = crate::BitReader;
5///Field `BPE` reader - Bit period error
6pub type BPE_R = crate::BitReader;
7///Field `RBTFE` reader - Rx block transfer finished error
8pub type RBTFE_R = crate::BitReader;
9///Field `SBE` reader - Start bit error
10pub type SBE_R = crate::BitReader;
11///Field `ACKE` reader - Block acknowledge error
12pub type ACKE_R = crate::BitReader;
13///Field `LINE` reader - Line error
14pub type LINE_R = crate::BitReader;
15///Field `TBTFE` reader - Tx block transfer finished error
16pub type TBTFE_R = crate::BitReader;
17impl R {
18    ///Bit 0 - Bit timing error
19    #[inline(always)]
20    pub fn bte(&self) -> BTE_R {
21        BTE_R::new((self.bits & 1) != 0)
22    }
23    ///Bit 1 - Bit period error
24    #[inline(always)]
25    pub fn bpe(&self) -> BPE_R {
26        BPE_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    ///Bit 2 - Rx block transfer finished error
29    #[inline(always)]
30    pub fn rbtfe(&self) -> RBTFE_R {
31        RBTFE_R::new(((self.bits >> 2) & 1) != 0)
32    }
33    ///Bit 3 - Start bit error
34    #[inline(always)]
35    pub fn sbe(&self) -> SBE_R {
36        SBE_R::new(((self.bits >> 3) & 1) != 0)
37    }
38    ///Bit 4 - Block acknowledge error
39    #[inline(always)]
40    pub fn acke(&self) -> ACKE_R {
41        ACKE_R::new(((self.bits >> 4) & 1) != 0)
42    }
43    ///Bit 5 - Line error
44    #[inline(always)]
45    pub fn line(&self) -> LINE_R {
46        LINE_R::new(((self.bits >> 5) & 1) != 0)
47    }
48    ///Bit 6 - Tx block transfer finished error
49    #[inline(always)]
50    pub fn tbtfe(&self) -> TBTFE_R {
51        TBTFE_R::new(((self.bits >> 6) & 1) != 0)
52    }
53}
54impl core::fmt::Debug for R {
55    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
56        f.debug_struct("ESR")
57            .field("bte", &self.bte())
58            .field("bpe", &self.bpe())
59            .field("rbtfe", &self.rbtfe())
60            .field("sbe", &self.sbe())
61            .field("acke", &self.acke())
62            .field("line", &self.line())
63            .field("tbtfe", &self.tbtfe())
64            .finish()
65    }
66}
67/**CEC error status register
68
69You can [`read`](crate::Reg::read) this register and get [`esr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
70
71See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F100.html#CEC:ESR)*/
72pub struct ESRrs;
73impl crate::RegisterSpec for ESRrs {
74    type Ux = u32;
75}
76///`read()` method returns [`esr::R`](R) reader structure
77impl crate::Readable for ESRrs {}
78///`reset()` method sets ESR to value 0
79impl crate::Resettable for ESRrs {}
stm32f1_staging/stm32f100/cec/esr.rs

stm32f1_staging/stm32f100/cec/
esr.rs
