stm32f1_staging/stm32f107/tim1/
sr.rs

1///Register `SR` reader
2pub type R = crate::R<SRrs>;
3///Register `SR` writer
4pub type W = crate::W<SRrs>;
5/**Update interrupt flag
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum UIFR {
11    ///0: No update occurred
12    NoUpdateOccurred = 0,
13    ///1: Update interrupt pending
14    UpdatePending = 1,
15}
16impl From<UIFR> for bool {
17    #[inline(always)]
18    fn from(variant: UIFR) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `UIF` reader - Update interrupt flag
23pub type UIF_R = crate::BitReader<UIFR>;
24impl UIF_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> UIFR {
28        match self.bits {
29            false => UIFR::NoUpdateOccurred,
30            true => UIFR::UpdatePending,
31        }
32    }
33    ///No update occurred
34    #[inline(always)]
35    pub fn is_no_update_occurred(&self) -> bool {
36        *self == UIFR::NoUpdateOccurred
37    }
38    ///Update interrupt pending
39    #[inline(always)]
40    pub fn is_update_pending(&self) -> bool {
41        *self == UIFR::UpdatePending
42    }
43}
44/**Update interrupt flag
45
46Value on reset: 0*/
47#[cfg_attr(feature = "defmt", derive(defmt::Format))]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49pub enum UIFW {
50    ///0: Clear flag
51    Clear = 0,
52}
53impl From<UIFW> for bool {
54    #[inline(always)]
55    fn from(variant: UIFW) -> Self {
56        variant as u8 != 0
57    }
58}
59///Field `UIF` writer - Update interrupt flag
60pub type UIF_W<'a, REG> = crate::BitWriter0C<'a, REG, UIFW>;
61impl<'a, REG> UIF_W<'a, REG>
62where
63    REG: crate::Writable + crate::RegisterSpec,
64{
65    ///Clear flag
66    #[inline(always)]
67    pub fn clear(self) -> &'a mut crate::W<REG> {
68        self.variant(UIFW::Clear)
69    }
70}
71/**Capture/compare %s interrupt flag
72
73Value on reset: 0*/
74#[cfg_attr(feature = "defmt", derive(defmt::Format))]
75#[derive(Clone, Copy, Debug, PartialEq, Eq)]
76pub enum CC1IFR {
77    ///0: No campture/compare has been detected
78    NoMatch = 0,
79    ///1: If CC1 is an output: The content of the counter TIMx_CNT matches the content of the TIMx_CCR1 register. If CC1 is an input: The counter value has been captured in TIMx_CCR1 register.
80    Match = 1,
81}
82impl From<CC1IFR> for bool {
83    #[inline(always)]
84    fn from(variant: CC1IFR) -> Self {
85        variant as u8 != 0
86    }
87}
88///Field `CCIF(1-4)` reader - Capture/compare %s interrupt flag
89pub type CCIF_R = crate::BitReader<CC1IFR>;
90impl CCIF_R {
91    ///Get enumerated values variant
92    #[inline(always)]
93    pub const fn variant(&self) -> CC1IFR {
94        match self.bits {
95            false => CC1IFR::NoMatch,
96            true => CC1IFR::Match,
97        }
98    }
99    ///No campture/compare has been detected
100    #[inline(always)]
101    pub fn is_no_match(&self) -> bool {
102        *self == CC1IFR::NoMatch
103    }
104    ///If CC1 is an output: The content of the counter TIMx_CNT matches the content of the TIMx_CCR1 register. If CC1 is an input: The counter value has been captured in TIMx_CCR1 register.
105    #[inline(always)]
106    pub fn is_match(&self) -> bool {
107        *self == CC1IFR::Match
108    }
109}
110/**Capture/compare %s interrupt flag
111
112Value on reset: 0*/
113#[cfg_attr(feature = "defmt", derive(defmt::Format))]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum CC1IFW {
116    ///0: Clear flag
117    Clear = 0,
118}
119impl From<CC1IFW> for bool {
120    #[inline(always)]
121    fn from(variant: CC1IFW) -> Self {
122        variant as u8 != 0
123    }
124}
125///Field `CCIF(1-4)` writer - Capture/compare %s interrupt flag
126pub type CCIF_W<'a, REG> = crate::BitWriter0C<'a, REG, CC1IFW>;
127impl<'a, REG> CCIF_W<'a, REG>
128where
129    REG: crate::Writable + crate::RegisterSpec,
130{
131    ///Clear flag
132    #[inline(always)]
133    pub fn clear(self) -> &'a mut crate::W<REG> {
134        self.variant(CC1IFW::Clear)
135    }
136}
137/**COM interrupt flag
138
139Value on reset: 0*/
140#[cfg_attr(feature = "defmt", derive(defmt::Format))]
141#[derive(Clone, Copy, Debug, PartialEq, Eq)]
142pub enum COMIFR {
143    ///0: No COM event occurred
144    NoCom = 0,
145    ///1: COM interrupt pending
146    Com = 1,
147}
148impl From<COMIFR> for bool {
149    #[inline(always)]
150    fn from(variant: COMIFR) -> Self {
151        variant as u8 != 0
152    }
153}
154///Field `COMIF` reader - COM interrupt flag
155pub type COMIF_R = crate::BitReader<COMIFR>;
156impl COMIF_R {
157    ///Get enumerated values variant
158    #[inline(always)]
159    pub const fn variant(&self) -> COMIFR {
160        match self.bits {
161            false => COMIFR::NoCom,
162            true => COMIFR::Com,
163        }
164    }
165    ///No COM event occurred
166    #[inline(always)]
167    pub fn is_no_com(&self) -> bool {
168        *self == COMIFR::NoCom
169    }
170    ///COM interrupt pending
171    #[inline(always)]
172    pub fn is_com(&self) -> bool {
173        *self == COMIFR::Com
174    }
175}
176/**COM interrupt flag
177
178Value on reset: 0*/
179#[cfg_attr(feature = "defmt", derive(defmt::Format))]
180#[derive(Clone, Copy, Debug, PartialEq, Eq)]
181pub enum COMIFW {
182    ///0: Clear flag
183    Clear = 0,
184}
185impl From<COMIFW> for bool {
186    #[inline(always)]
187    fn from(variant: COMIFW) -> Self {
188        variant as u8 != 0
189    }
190}
191///Field `COMIF` writer - COM interrupt flag
192pub type COMIF_W<'a, REG> = crate::BitWriter0C<'a, REG, COMIFW>;
193impl<'a, REG> COMIF_W<'a, REG>
194where
195    REG: crate::Writable + crate::RegisterSpec,
196{
197    ///Clear flag
198    #[inline(always)]
199    pub fn clear(self) -> &'a mut crate::W<REG> {
200        self.variant(COMIFW::Clear)
201    }
202}
203/**Trigger interrupt flag
204
205Value on reset: 0*/
206#[cfg_attr(feature = "defmt", derive(defmt::Format))]
207#[derive(Clone, Copy, Debug, PartialEq, Eq)]
208pub enum TIFR {
209    ///0: No trigger event occurred
210    NoTrigger = 0,
211    ///1: Trigger interrupt pending
212    Trigger = 1,
213}
214impl From<TIFR> for bool {
215    #[inline(always)]
216    fn from(variant: TIFR) -> Self {
217        variant as u8 != 0
218    }
219}
220///Field `TIF` reader - Trigger interrupt flag
221pub type TIF_R = crate::BitReader<TIFR>;
222impl TIF_R {
223    ///Get enumerated values variant
224    #[inline(always)]
225    pub const fn variant(&self) -> TIFR {
226        match self.bits {
227            false => TIFR::NoTrigger,
228            true => TIFR::Trigger,
229        }
230    }
231    ///No trigger event occurred
232    #[inline(always)]
233    pub fn is_no_trigger(&self) -> bool {
234        *self == TIFR::NoTrigger
235    }
236    ///Trigger interrupt pending
237    #[inline(always)]
238    pub fn is_trigger(&self) -> bool {
239        *self == TIFR::Trigger
240    }
241}
242/**Trigger interrupt flag
243
244Value on reset: 0*/
245#[cfg_attr(feature = "defmt", derive(defmt::Format))]
246#[derive(Clone, Copy, Debug, PartialEq, Eq)]
247pub enum TIFW {
248    ///0: Clear flag
249    Clear = 0,
250}
251impl From<TIFW> for bool {
252    #[inline(always)]
253    fn from(variant: TIFW) -> Self {
254        variant as u8 != 0
255    }
256}
257///Field `TIF` writer - Trigger interrupt flag
258pub type TIF_W<'a, REG> = crate::BitWriter0C<'a, REG, TIFW>;
259impl<'a, REG> TIF_W<'a, REG>
260where
261    REG: crate::Writable + crate::RegisterSpec,
262{
263    ///Clear flag
264    #[inline(always)]
265    pub fn clear(self) -> &'a mut crate::W<REG> {
266        self.variant(TIFW::Clear)
267    }
268}
269/**Break interrupt flag
270
271Value on reset: 0*/
272#[cfg_attr(feature = "defmt", derive(defmt::Format))]
273#[derive(Clone, Copy, Debug, PartialEq, Eq)]
274pub enum BIFR {
275    ///0: No break event occurred
276    NoTrigger = 0,
277    ///1: An active level has been detected on the break input. An interrupt is generated if BIE=1 in the TIMx_DIER register
278    Trigger = 1,
279}
280impl From<BIFR> for bool {
281    #[inline(always)]
282    fn from(variant: BIFR) -> Self {
283        variant as u8 != 0
284    }
285}
286///Field `BIF` reader - Break interrupt flag
287pub type BIF_R = crate::BitReader<BIFR>;
288impl BIF_R {
289    ///Get enumerated values variant
290    #[inline(always)]
291    pub const fn variant(&self) -> BIFR {
292        match self.bits {
293            false => BIFR::NoTrigger,
294            true => BIFR::Trigger,
295        }
296    }
297    ///No break event occurred
298    #[inline(always)]
299    pub fn is_no_trigger(&self) -> bool {
300        *self == BIFR::NoTrigger
301    }
302    ///An active level has been detected on the break input. An interrupt is generated if BIE=1 in the TIMx_DIER register
303    #[inline(always)]
304    pub fn is_trigger(&self) -> bool {
305        *self == BIFR::Trigger
306    }
307}
308/**Break interrupt flag
309
310Value on reset: 0*/
311#[cfg_attr(feature = "defmt", derive(defmt::Format))]
312#[derive(Clone, Copy, Debug, PartialEq, Eq)]
313pub enum BIFW {
314    ///0: Clear flag
315    Clear = 0,
316}
317impl From<BIFW> for bool {
318    #[inline(always)]
319    fn from(variant: BIFW) -> Self {
320        variant as u8 != 0
321    }
322}
323///Field `BIF` writer - Break interrupt flag
324pub type BIF_W<'a, REG> = crate::BitWriter0C<'a, REG, BIFW>;
325impl<'a, REG> BIF_W<'a, REG>
326where
327    REG: crate::Writable + crate::RegisterSpec,
328{
329    ///Clear flag
330    #[inline(always)]
331    pub fn clear(self) -> &'a mut crate::W<REG> {
332        self.variant(BIFW::Clear)
333    }
334}
335/**Capture/Compare %s overcapture flag
336
337Value on reset: 0*/
338#[cfg_attr(feature = "defmt", derive(defmt::Format))]
339#[derive(Clone, Copy, Debug, PartialEq, Eq)]
340pub enum CC1OFR {
341    ///0: No overcapture has been detected
342    NoOvercapture = 0,
343    ///1: The counter value has been captured in TIMx_CCRx register while CCxIF flag was already set
344    Overcapture = 1,
345}
346impl From<CC1OFR> for bool {
347    #[inline(always)]
348    fn from(variant: CC1OFR) -> Self {
349        variant as u8 != 0
350    }
351}
352///Field `CCOF(1-4)` reader - Capture/Compare %s overcapture flag
353pub type CCOF_R = crate::BitReader<CC1OFR>;
354impl CCOF_R {
355    ///Get enumerated values variant
356    #[inline(always)]
357    pub const fn variant(&self) -> CC1OFR {
358        match self.bits {
359            false => CC1OFR::NoOvercapture,
360            true => CC1OFR::Overcapture,
361        }
362    }
363    ///No overcapture has been detected
364    #[inline(always)]
365    pub fn is_no_overcapture(&self) -> bool {
366        *self == CC1OFR::NoOvercapture
367    }
368    ///The counter value has been captured in TIMx_CCRx register while CCxIF flag was already set
369    #[inline(always)]
370    pub fn is_overcapture(&self) -> bool {
371        *self == CC1OFR::Overcapture
372    }
373}
374/**Capture/Compare %s overcapture flag
375
376Value on reset: 0*/
377#[cfg_attr(feature = "defmt", derive(defmt::Format))]
378#[derive(Clone, Copy, Debug, PartialEq, Eq)]
379pub enum CC1OFW {
380    ///0: Clear flag
381    Clear = 0,
382}
383impl From<CC1OFW> for bool {
384    #[inline(always)]
385    fn from(variant: CC1OFW) -> Self {
386        variant as u8 != 0
387    }
388}
389///Field `CCOF(1-4)` writer - Capture/Compare %s overcapture flag
390pub type CCOF_W<'a, REG> = crate::BitWriter0C<'a, REG, CC1OFW>;
391impl<'a, REG> CCOF_W<'a, REG>
392where
393    REG: crate::Writable + crate::RegisterSpec,
394{
395    ///Clear flag
396    #[inline(always)]
397    pub fn clear(self) -> &'a mut crate::W<REG> {
398        self.variant(CC1OFW::Clear)
399    }
400}
401impl R {
402    ///Bit 0 - Update interrupt flag
403    #[inline(always)]
404    pub fn uif(&self) -> UIF_R {
405        UIF_R::new((self.bits & 1) != 0)
406    }
407    ///Capture/compare (1-4) interrupt flag
408    ///
409    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1IF` field.</div>
410    #[inline(always)]
411    pub fn ccif(&self, n: u8) -> CCIF_R {
412        #[allow(clippy::no_effect)] [(); 4][n as usize];
413        CCIF_R::new(((self.bits >> (n + 1)) & 1) != 0)
414    }
415    ///Iterator for array of:
416    ///Capture/compare (1-4) interrupt flag
417    #[inline(always)]
418    pub fn ccif_iter(&self) -> impl Iterator<Item = CCIF_R> + '_ {
419        (0..4).map(move |n| CCIF_R::new(((self.bits >> (n + 1)) & 1) != 0))
420    }
421    ///Bit 1 - Capture/compare 1 interrupt flag
422    #[inline(always)]
423    pub fn cc1if(&self) -> CCIF_R {
424        CCIF_R::new(((self.bits >> 1) & 1) != 0)
425    }
426    ///Bit 2 - Capture/compare 2 interrupt flag
427    #[inline(always)]
428    pub fn cc2if(&self) -> CCIF_R {
429        CCIF_R::new(((self.bits >> 2) & 1) != 0)
430    }
431    ///Bit 3 - Capture/compare 3 interrupt flag
432    #[inline(always)]
433    pub fn cc3if(&self) -> CCIF_R {
434        CCIF_R::new(((self.bits >> 3) & 1) != 0)
435    }
436    ///Bit 4 - Capture/compare 4 interrupt flag
437    #[inline(always)]
438    pub fn cc4if(&self) -> CCIF_R {
439        CCIF_R::new(((self.bits >> 4) & 1) != 0)
440    }
441    ///Bit 5 - COM interrupt flag
442    #[inline(always)]
443    pub fn comif(&self) -> COMIF_R {
444        COMIF_R::new(((self.bits >> 5) & 1) != 0)
445    }
446    ///Bit 6 - Trigger interrupt flag
447    #[inline(always)]
448    pub fn tif(&self) -> TIF_R {
449        TIF_R::new(((self.bits >> 6) & 1) != 0)
450    }
451    ///Bit 7 - Break interrupt flag
452    #[inline(always)]
453    pub fn bif(&self) -> BIF_R {
454        BIF_R::new(((self.bits >> 7) & 1) != 0)
455    }
456    ///Capture/Compare (1-4) overcapture flag
457    ///
458    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1OF` field.</div>
459    #[inline(always)]
460    pub fn ccof(&self, n: u8) -> CCOF_R {
461        #[allow(clippy::no_effect)] [(); 4][n as usize];
462        CCOF_R::new(((self.bits >> (n + 9)) & 1) != 0)
463    }
464    ///Iterator for array of:
465    ///Capture/Compare (1-4) overcapture flag
466    #[inline(always)]
467    pub fn ccof_iter(&self) -> impl Iterator<Item = CCOF_R> + '_ {
468        (0..4).map(move |n| CCOF_R::new(((self.bits >> (n + 9)) & 1) != 0))
469    }
470    ///Bit 9 - Capture/Compare 1 overcapture flag
471    #[inline(always)]
472    pub fn cc1of(&self) -> CCOF_R {
473        CCOF_R::new(((self.bits >> 9) & 1) != 0)
474    }
475    ///Bit 10 - Capture/Compare 2 overcapture flag
476    #[inline(always)]
477    pub fn cc2of(&self) -> CCOF_R {
478        CCOF_R::new(((self.bits >> 10) & 1) != 0)
479    }
480    ///Bit 11 - Capture/Compare 3 overcapture flag
481    #[inline(always)]
482    pub fn cc3of(&self) -> CCOF_R {
483        CCOF_R::new(((self.bits >> 11) & 1) != 0)
484    }
485    ///Bit 12 - Capture/Compare 4 overcapture flag
486    #[inline(always)]
487    pub fn cc4of(&self) -> CCOF_R {
488        CCOF_R::new(((self.bits >> 12) & 1) != 0)
489    }
490}
491impl core::fmt::Debug for R {
492    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
493        f.debug_struct("SR")
494            .field("cc1of", &self.cc1of())
495            .field("cc2of", &self.cc2of())
496            .field("cc3of", &self.cc3of())
497            .field("cc4of", &self.cc4of())
498            .field("bif", &self.bif())
499            .field("tif", &self.tif())
500            .field("comif", &self.comif())
501            .field("cc1if", &self.cc1if())
502            .field("cc2if", &self.cc2if())
503            .field("cc3if", &self.cc3if())
504            .field("cc4if", &self.cc4if())
505            .field("uif", &self.uif())
506            .finish()
507    }
508}
509impl W {
510    ///Bit 0 - Update interrupt flag
511    #[inline(always)]
512    pub fn uif(&mut self) -> UIF_W<SRrs> {
513        UIF_W::new(self, 0)
514    }
515    ///Capture/compare (1-4) interrupt flag
516    ///
517    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1IF` field.</div>
518    #[inline(always)]
519    pub fn ccif(&mut self, n: u8) -> CCIF_W<SRrs> {
520        #[allow(clippy::no_effect)] [(); 4][n as usize];
521        CCIF_W::new(self, n + 1)
522    }
523    ///Bit 1 - Capture/compare 1 interrupt flag
524    #[inline(always)]
525    pub fn cc1if(&mut self) -> CCIF_W<SRrs> {
526        CCIF_W::new(self, 1)
527    }
528    ///Bit 2 - Capture/compare 2 interrupt flag
529    #[inline(always)]
530    pub fn cc2if(&mut self) -> CCIF_W<SRrs> {
531        CCIF_W::new(self, 2)
532    }
533    ///Bit 3 - Capture/compare 3 interrupt flag
534    #[inline(always)]
535    pub fn cc3if(&mut self) -> CCIF_W<SRrs> {
536        CCIF_W::new(self, 3)
537    }
538    ///Bit 4 - Capture/compare 4 interrupt flag
539    #[inline(always)]
540    pub fn cc4if(&mut self) -> CCIF_W<SRrs> {
541        CCIF_W::new(self, 4)
542    }
543    ///Bit 5 - COM interrupt flag
544    #[inline(always)]
545    pub fn comif(&mut self) -> COMIF_W<SRrs> {
546        COMIF_W::new(self, 5)
547    }
548    ///Bit 6 - Trigger interrupt flag
549    #[inline(always)]
550    pub fn tif(&mut self) -> TIF_W<SRrs> {
551        TIF_W::new(self, 6)
552    }
553    ///Bit 7 - Break interrupt flag
554    #[inline(always)]
555    pub fn bif(&mut self) -> BIF_W<SRrs> {
556        BIF_W::new(self, 7)
557    }
558    ///Capture/Compare (1-4) overcapture flag
559    ///
560    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1OF` field.</div>
561    #[inline(always)]
562    pub fn ccof(&mut self, n: u8) -> CCOF_W<SRrs> {
563        #[allow(clippy::no_effect)] [(); 4][n as usize];
564        CCOF_W::new(self, n + 9)
565    }
566    ///Bit 9 - Capture/Compare 1 overcapture flag
567    #[inline(always)]
568    pub fn cc1of(&mut self) -> CCOF_W<SRrs> {
569        CCOF_W::new(self, 9)
570    }
571    ///Bit 10 - Capture/Compare 2 overcapture flag
572    #[inline(always)]
573    pub fn cc2of(&mut self) -> CCOF_W<SRrs> {
574        CCOF_W::new(self, 10)
575    }
576    ///Bit 11 - Capture/Compare 3 overcapture flag
577    #[inline(always)]
578    pub fn cc3of(&mut self) -> CCOF_W<SRrs> {
579        CCOF_W::new(self, 11)
580    }
581    ///Bit 12 - Capture/Compare 4 overcapture flag
582    #[inline(always)]
583    pub fn cc4of(&mut self) -> CCOF_W<SRrs> {
584        CCOF_W::new(self, 12)
585    }
586}
587/**status register
588
589You can [`read`](crate::Reg::read) this register and get [`sr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
590
591See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F107.html#TIM1:SR)*/
592pub struct SRrs;
593impl crate::RegisterSpec for SRrs {
594    type Ux = u32;
595}
596///`read()` method returns [`sr::R`](R) reader structure
597impl crate::Readable for SRrs {}
598///`write(|w| ..)` method takes [`sr::W`](W) writer structure
599impl crate::Writable for SRrs {
600    type Safety = crate::Unsafe;
601    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0x1eff;
602}
603///`reset()` method sets SR to value 0
604impl crate::Resettable for SRrs {}
stm32f1_staging/stm32f107/tim1/sr.rs

stm32f1_staging/stm32f107/tim1/
sr.rs
