stm32f1_staging/stm32f107/fsmc/
pmem4.rs

1///Register `PMEM4` reader
2pub type R = crate::R<PMEM4rs>;
3///Register `PMEM4` writer
4pub type W = crate::W<PMEM4rs>;
5///Field `MEMSETx` reader - MEMSETx
6pub type MEMSETX_R = crate::FieldReader;
7///Field `MEMSETx` writer - MEMSETx
8pub type MEMSETX_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9///Field `MEMWAITx` reader - MEMWAITx
10pub type MEMWAITX_R = crate::FieldReader;
11///Field `MEMWAITx` writer - MEMWAITx
12pub type MEMWAITX_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13///Field `MEMHOLDx` reader - MEMHOLDx
14pub type MEMHOLDX_R = crate::FieldReader;
15///Field `MEMHOLDx` writer - MEMHOLDx
16pub type MEMHOLDX_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
17///Field `MEMHIZx` reader - MEMHIZx
18pub type MEMHIZX_R = crate::FieldReader;
19///Field `MEMHIZx` writer - MEMHIZx
20pub type MEMHIZX_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
21impl R {
22    ///Bits 0:7 - MEMSETx
23    #[inline(always)]
24    pub fn memsetx(&self) -> MEMSETX_R {
25        MEMSETX_R::new((self.bits & 0xff) as u8)
26    }
27    ///Bits 8:15 - MEMWAITx
28    #[inline(always)]
29    pub fn memwaitx(&self) -> MEMWAITX_R {
30        MEMWAITX_R::new(((self.bits >> 8) & 0xff) as u8)
31    }
32    ///Bits 16:23 - MEMHOLDx
33    #[inline(always)]
34    pub fn memholdx(&self) -> MEMHOLDX_R {
35        MEMHOLDX_R::new(((self.bits >> 16) & 0xff) as u8)
36    }
37    ///Bits 24:31 - MEMHIZx
38    #[inline(always)]
39    pub fn memhizx(&self) -> MEMHIZX_R {
40        MEMHIZX_R::new(((self.bits >> 24) & 0xff) as u8)
41    }
42}
43impl core::fmt::Debug for R {
44    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
45        f.debug_struct("PMEM4")
46            .field("memhizx", &self.memhizx())
47            .field("memholdx", &self.memholdx())
48            .field("memwaitx", &self.memwaitx())
49            .field("memsetx", &self.memsetx())
50            .finish()
51    }
52}
53impl W {
54    ///Bits 0:7 - MEMSETx
55    #[inline(always)]
56    pub fn memsetx(&mut self) -> MEMSETX_W<PMEM4rs> {
57        MEMSETX_W::new(self, 0)
58    }
59    ///Bits 8:15 - MEMWAITx
60    #[inline(always)]
61    pub fn memwaitx(&mut self) -> MEMWAITX_W<PMEM4rs> {
62        MEMWAITX_W::new(self, 8)
63    }
64    ///Bits 16:23 - MEMHOLDx
65    #[inline(always)]
66    pub fn memholdx(&mut self) -> MEMHOLDX_W<PMEM4rs> {
67        MEMHOLDX_W::new(self, 16)
68    }
69    ///Bits 24:31 - MEMHIZx
70    #[inline(always)]
71    pub fn memhizx(&mut self) -> MEMHIZX_W<PMEM4rs> {
72        MEMHIZX_W::new(self, 24)
73    }
74}
75/**Common memory space timing register 4
76
77You can [`read`](crate::Reg::read) this register and get [`pmem4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmem4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
78
79See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F107.html#FSMC:PMEM4)*/
80pub struct PMEM4rs;
81impl crate::RegisterSpec for PMEM4rs {
82    type Ux = u32;
83}
84///`read()` method returns [`pmem4::R`](R) reader structure
85impl crate::Readable for PMEM4rs {}
86///`write(|w| ..)` method takes [`pmem4::W`](W) writer structure
87impl crate::Writable for PMEM4rs {
88    type Safety = crate::Unsafe;
89}
90///`reset()` method sets PMEM4 to value 0xfcfc_fcfc
91impl crate::Resettable for PMEM4rs {
92    const RESET_VALUE: u32 = 0xfcfc_fcfc;
93}
stm32f1_staging/stm32f107/fsmc/pmem4.rs

stm32f1_staging/stm32f107/fsmc/
pmem4.rs
