stm32f1_staging/stm32f103/tim1/
dier.rs

1///Register `DIER` reader
2pub type R = crate::R<DIERrs>;
3///Register `DIER` writer
4pub type W = crate::W<DIERrs>;
5/**Update interrupt enable
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum UIE {
11    ///0: Update interrupt disabled
12    Disabled = 0,
13    ///1: Update interrupt enabled
14    Enabled = 1,
15}
16impl From<UIE> for bool {
17    #[inline(always)]
18    fn from(variant: UIE) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `UIE` reader - Update interrupt enable
23pub type UIE_R = crate::BitReader<UIE>;
24impl UIE_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> UIE {
28        match self.bits {
29            false => UIE::Disabled,
30            true => UIE::Enabled,
31        }
32    }
33    ///Update interrupt disabled
34    #[inline(always)]
35    pub fn is_disabled(&self) -> bool {
36        *self == UIE::Disabled
37    }
38    ///Update interrupt enabled
39    #[inline(always)]
40    pub fn is_enabled(&self) -> bool {
41        *self == UIE::Enabled
42    }
43}
44///Field `UIE` writer - Update interrupt enable
45pub type UIE_W<'a, REG> = crate::BitWriter<'a, REG, UIE>;
46impl<'a, REG> UIE_W<'a, REG>
47where
48    REG: crate::Writable + crate::RegisterSpec,
49{
50    ///Update interrupt disabled
51    #[inline(always)]
52    pub fn disabled(self) -> &'a mut crate::W<REG> {
53        self.variant(UIE::Disabled)
54    }
55    ///Update interrupt enabled
56    #[inline(always)]
57    pub fn enabled(self) -> &'a mut crate::W<REG> {
58        self.variant(UIE::Enabled)
59    }
60}
61/**Capture/Compare %s interrupt enable
62
63Value on reset: 0*/
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum CC1IE {
67    ///0: CCx interrupt disabled
68    Disabled = 0,
69    ///1: CCx interrupt enabled
70    Enabled = 1,
71}
72impl From<CC1IE> for bool {
73    #[inline(always)]
74    fn from(variant: CC1IE) -> Self {
75        variant as u8 != 0
76    }
77}
78///Field `CCIE(1-4)` reader - Capture/Compare %s interrupt enable
79pub type CCIE_R = crate::BitReader<CC1IE>;
80impl CCIE_R {
81    ///Get enumerated values variant
82    #[inline(always)]
83    pub const fn variant(&self) -> CC1IE {
84        match self.bits {
85            false => CC1IE::Disabled,
86            true => CC1IE::Enabled,
87        }
88    }
89    ///CCx interrupt disabled
90    #[inline(always)]
91    pub fn is_disabled(&self) -> bool {
92        *self == CC1IE::Disabled
93    }
94    ///CCx interrupt enabled
95    #[inline(always)]
96    pub fn is_enabled(&self) -> bool {
97        *self == CC1IE::Enabled
98    }
99}
100///Field `CCIE(1-4)` writer - Capture/Compare %s interrupt enable
101pub type CCIE_W<'a, REG> = crate::BitWriter<'a, REG, CC1IE>;
102impl<'a, REG> CCIE_W<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    ///CCx interrupt disabled
107    #[inline(always)]
108    pub fn disabled(self) -> &'a mut crate::W<REG> {
109        self.variant(CC1IE::Disabled)
110    }
111    ///CCx interrupt enabled
112    #[inline(always)]
113    pub fn enabled(self) -> &'a mut crate::W<REG> {
114        self.variant(CC1IE::Enabled)
115    }
116}
117/**COM interrupt enable
118
119Value on reset: 0*/
120#[cfg_attr(feature = "defmt", derive(defmt::Format))]
121#[derive(Clone, Copy, Debug, PartialEq, Eq)]
122pub enum COMIE {
123    ///0: COM interrupt disabled
124    Disabled = 0,
125    ///1: COM interrupt enabled
126    Enabled = 1,
127}
128impl From<COMIE> for bool {
129    #[inline(always)]
130    fn from(variant: COMIE) -> Self {
131        variant as u8 != 0
132    }
133}
134///Field `COMIE` reader - COM interrupt enable
135pub type COMIE_R = crate::BitReader<COMIE>;
136impl COMIE_R {
137    ///Get enumerated values variant
138    #[inline(always)]
139    pub const fn variant(&self) -> COMIE {
140        match self.bits {
141            false => COMIE::Disabled,
142            true => COMIE::Enabled,
143        }
144    }
145    ///COM interrupt disabled
146    #[inline(always)]
147    pub fn is_disabled(&self) -> bool {
148        *self == COMIE::Disabled
149    }
150    ///COM interrupt enabled
151    #[inline(always)]
152    pub fn is_enabled(&self) -> bool {
153        *self == COMIE::Enabled
154    }
155}
156///Field `COMIE` writer - COM interrupt enable
157pub type COMIE_W<'a, REG> = crate::BitWriter<'a, REG, COMIE>;
158impl<'a, REG> COMIE_W<'a, REG>
159where
160    REG: crate::Writable + crate::RegisterSpec,
161{
162    ///COM interrupt disabled
163    #[inline(always)]
164    pub fn disabled(self) -> &'a mut crate::W<REG> {
165        self.variant(COMIE::Disabled)
166    }
167    ///COM interrupt enabled
168    #[inline(always)]
169    pub fn enabled(self) -> &'a mut crate::W<REG> {
170        self.variant(COMIE::Enabled)
171    }
172}
173/**Trigger interrupt enable
174
175Value on reset: 0*/
176#[cfg_attr(feature = "defmt", derive(defmt::Format))]
177#[derive(Clone, Copy, Debug, PartialEq, Eq)]
178pub enum TIE {
179    ///0: Trigger interrupt disabled
180    Disabled = 0,
181    ///1: Trigger interrupt enabled
182    Enabled = 1,
183}
184impl From<TIE> for bool {
185    #[inline(always)]
186    fn from(variant: TIE) -> Self {
187        variant as u8 != 0
188    }
189}
190///Field `TIE` reader - Trigger interrupt enable
191pub type TIE_R = crate::BitReader<TIE>;
192impl TIE_R {
193    ///Get enumerated values variant
194    #[inline(always)]
195    pub const fn variant(&self) -> TIE {
196        match self.bits {
197            false => TIE::Disabled,
198            true => TIE::Enabled,
199        }
200    }
201    ///Trigger interrupt disabled
202    #[inline(always)]
203    pub fn is_disabled(&self) -> bool {
204        *self == TIE::Disabled
205    }
206    ///Trigger interrupt enabled
207    #[inline(always)]
208    pub fn is_enabled(&self) -> bool {
209        *self == TIE::Enabled
210    }
211}
212///Field `TIE` writer - Trigger interrupt enable
213pub type TIE_W<'a, REG> = crate::BitWriter<'a, REG, TIE>;
214impl<'a, REG> TIE_W<'a, REG>
215where
216    REG: crate::Writable + crate::RegisterSpec,
217{
218    ///Trigger interrupt disabled
219    #[inline(always)]
220    pub fn disabled(self) -> &'a mut crate::W<REG> {
221        self.variant(TIE::Disabled)
222    }
223    ///Trigger interrupt enabled
224    #[inline(always)]
225    pub fn enabled(self) -> &'a mut crate::W<REG> {
226        self.variant(TIE::Enabled)
227    }
228}
229/**Break interrupt enable
230
231Value on reset: 0*/
232#[cfg_attr(feature = "defmt", derive(defmt::Format))]
233#[derive(Clone, Copy, Debug, PartialEq, Eq)]
234pub enum BIE {
235    ///0: Break interrupt disabled
236    Disabled = 0,
237    ///1: Break interrupt enabled
238    Enabled = 1,
239}
240impl From<BIE> for bool {
241    #[inline(always)]
242    fn from(variant: BIE) -> Self {
243        variant as u8 != 0
244    }
245}
246///Field `BIE` reader - Break interrupt enable
247pub type BIE_R = crate::BitReader<BIE>;
248impl BIE_R {
249    ///Get enumerated values variant
250    #[inline(always)]
251    pub const fn variant(&self) -> BIE {
252        match self.bits {
253            false => BIE::Disabled,
254            true => BIE::Enabled,
255        }
256    }
257    ///Break interrupt disabled
258    #[inline(always)]
259    pub fn is_disabled(&self) -> bool {
260        *self == BIE::Disabled
261    }
262    ///Break interrupt enabled
263    #[inline(always)]
264    pub fn is_enabled(&self) -> bool {
265        *self == BIE::Enabled
266    }
267}
268///Field `BIE` writer - Break interrupt enable
269pub type BIE_W<'a, REG> = crate::BitWriter<'a, REG, BIE>;
270impl<'a, REG> BIE_W<'a, REG>
271where
272    REG: crate::Writable + crate::RegisterSpec,
273{
274    ///Break interrupt disabled
275    #[inline(always)]
276    pub fn disabled(self) -> &'a mut crate::W<REG> {
277        self.variant(BIE::Disabled)
278    }
279    ///Break interrupt enabled
280    #[inline(always)]
281    pub fn enabled(self) -> &'a mut crate::W<REG> {
282        self.variant(BIE::Enabled)
283    }
284}
285/**Update DMA request enable
286
287Value on reset: 0*/
288#[cfg_attr(feature = "defmt", derive(defmt::Format))]
289#[derive(Clone, Copy, Debug, PartialEq, Eq)]
290pub enum UDE {
291    ///0: Update DMA request disabled
292    Disabled = 0,
293    ///1: Update DMA request enabled
294    Enabled = 1,
295}
296impl From<UDE> for bool {
297    #[inline(always)]
298    fn from(variant: UDE) -> Self {
299        variant as u8 != 0
300    }
301}
302///Field `UDE` reader - Update DMA request enable
303pub type UDE_R = crate::BitReader<UDE>;
304impl UDE_R {
305    ///Get enumerated values variant
306    #[inline(always)]
307    pub const fn variant(&self) -> UDE {
308        match self.bits {
309            false => UDE::Disabled,
310            true => UDE::Enabled,
311        }
312    }
313    ///Update DMA request disabled
314    #[inline(always)]
315    pub fn is_disabled(&self) -> bool {
316        *self == UDE::Disabled
317    }
318    ///Update DMA request enabled
319    #[inline(always)]
320    pub fn is_enabled(&self) -> bool {
321        *self == UDE::Enabled
322    }
323}
324///Field `UDE` writer - Update DMA request enable
325pub type UDE_W<'a, REG> = crate::BitWriter<'a, REG, UDE>;
326impl<'a, REG> UDE_W<'a, REG>
327where
328    REG: crate::Writable + crate::RegisterSpec,
329{
330    ///Update DMA request disabled
331    #[inline(always)]
332    pub fn disabled(self) -> &'a mut crate::W<REG> {
333        self.variant(UDE::Disabled)
334    }
335    ///Update DMA request enabled
336    #[inline(always)]
337    pub fn enabled(self) -> &'a mut crate::W<REG> {
338        self.variant(UDE::Enabled)
339    }
340}
341/**Capture/Compare %s DMA request enable
342
343Value on reset: 0*/
344#[cfg_attr(feature = "defmt", derive(defmt::Format))]
345#[derive(Clone, Copy, Debug, PartialEq, Eq)]
346pub enum CC1DE {
347    ///0: CCx DMA request disabled
348    Disabled = 0,
349    ///1: CCx DMA request enabled
350    Enabled = 1,
351}
352impl From<CC1DE> for bool {
353    #[inline(always)]
354    fn from(variant: CC1DE) -> Self {
355        variant as u8 != 0
356    }
357}
358///Field `CCDE(1-4)` reader - Capture/Compare %s DMA request enable
359pub type CCDE_R = crate::BitReader<CC1DE>;
360impl CCDE_R {
361    ///Get enumerated values variant
362    #[inline(always)]
363    pub const fn variant(&self) -> CC1DE {
364        match self.bits {
365            false => CC1DE::Disabled,
366            true => CC1DE::Enabled,
367        }
368    }
369    ///CCx DMA request disabled
370    #[inline(always)]
371    pub fn is_disabled(&self) -> bool {
372        *self == CC1DE::Disabled
373    }
374    ///CCx DMA request enabled
375    #[inline(always)]
376    pub fn is_enabled(&self) -> bool {
377        *self == CC1DE::Enabled
378    }
379}
380///Field `CCDE(1-4)` writer - Capture/Compare %s DMA request enable
381pub type CCDE_W<'a, REG> = crate::BitWriter<'a, REG, CC1DE>;
382impl<'a, REG> CCDE_W<'a, REG>
383where
384    REG: crate::Writable + crate::RegisterSpec,
385{
386    ///CCx DMA request disabled
387    #[inline(always)]
388    pub fn disabled(self) -> &'a mut crate::W<REG> {
389        self.variant(CC1DE::Disabled)
390    }
391    ///CCx DMA request enabled
392    #[inline(always)]
393    pub fn enabled(self) -> &'a mut crate::W<REG> {
394        self.variant(CC1DE::Enabled)
395    }
396}
397/**COM DMA request enable
398
399Value on reset: 0*/
400#[cfg_attr(feature = "defmt", derive(defmt::Format))]
401#[derive(Clone, Copy, Debug, PartialEq, Eq)]
402pub enum COMDE {
403    ///0: COM DMA request disabled
404    Disabled = 0,
405    ///1: COM DMA request enabled
406    Enabled = 1,
407}
408impl From<COMDE> for bool {
409    #[inline(always)]
410    fn from(variant: COMDE) -> Self {
411        variant as u8 != 0
412    }
413}
414///Field `COMDE` reader - COM DMA request enable
415pub type COMDE_R = crate::BitReader<COMDE>;
416impl COMDE_R {
417    ///Get enumerated values variant
418    #[inline(always)]
419    pub const fn variant(&self) -> COMDE {
420        match self.bits {
421            false => COMDE::Disabled,
422            true => COMDE::Enabled,
423        }
424    }
425    ///COM DMA request disabled
426    #[inline(always)]
427    pub fn is_disabled(&self) -> bool {
428        *self == COMDE::Disabled
429    }
430    ///COM DMA request enabled
431    #[inline(always)]
432    pub fn is_enabled(&self) -> bool {
433        *self == COMDE::Enabled
434    }
435}
436///Field `COMDE` writer - COM DMA request enable
437pub type COMDE_W<'a, REG> = crate::BitWriter<'a, REG, COMDE>;
438impl<'a, REG> COMDE_W<'a, REG>
439where
440    REG: crate::Writable + crate::RegisterSpec,
441{
442    ///COM DMA request disabled
443    #[inline(always)]
444    pub fn disabled(self) -> &'a mut crate::W<REG> {
445        self.variant(COMDE::Disabled)
446    }
447    ///COM DMA request enabled
448    #[inline(always)]
449    pub fn enabled(self) -> &'a mut crate::W<REG> {
450        self.variant(COMDE::Enabled)
451    }
452}
453/**Trigger DMA request enable
454
455Value on reset: 0*/
456#[cfg_attr(feature = "defmt", derive(defmt::Format))]
457#[derive(Clone, Copy, Debug, PartialEq, Eq)]
458pub enum TDE {
459    ///0: Trigger DMA request disabled
460    Disabled = 0,
461    ///1: Trigger DMA request enabled
462    Enabled = 1,
463}
464impl From<TDE> for bool {
465    #[inline(always)]
466    fn from(variant: TDE) -> Self {
467        variant as u8 != 0
468    }
469}
470///Field `TDE` reader - Trigger DMA request enable
471pub type TDE_R = crate::BitReader<TDE>;
472impl TDE_R {
473    ///Get enumerated values variant
474    #[inline(always)]
475    pub const fn variant(&self) -> TDE {
476        match self.bits {
477            false => TDE::Disabled,
478            true => TDE::Enabled,
479        }
480    }
481    ///Trigger DMA request disabled
482    #[inline(always)]
483    pub fn is_disabled(&self) -> bool {
484        *self == TDE::Disabled
485    }
486    ///Trigger DMA request enabled
487    #[inline(always)]
488    pub fn is_enabled(&self) -> bool {
489        *self == TDE::Enabled
490    }
491}
492///Field `TDE` writer - Trigger DMA request enable
493pub type TDE_W<'a, REG> = crate::BitWriter<'a, REG, TDE>;
494impl<'a, REG> TDE_W<'a, REG>
495where
496    REG: crate::Writable + crate::RegisterSpec,
497{
498    ///Trigger DMA request disabled
499    #[inline(always)]
500    pub fn disabled(self) -> &'a mut crate::W<REG> {
501        self.variant(TDE::Disabled)
502    }
503    ///Trigger DMA request enabled
504    #[inline(always)]
505    pub fn enabled(self) -> &'a mut crate::W<REG> {
506        self.variant(TDE::Enabled)
507    }
508}
509impl R {
510    ///Bit 0 - Update interrupt enable
511    #[inline(always)]
512    pub fn uie(&self) -> UIE_R {
513        UIE_R::new((self.bits & 1) != 0)
514    }
515    ///Capture/Compare (1-4) interrupt enable
516    ///
517    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1IE` field.</div>
518    #[inline(always)]
519    pub fn ccie(&self, n: u8) -> CCIE_R {
520        #[allow(clippy::no_effect)] [(); 4][n as usize];
521        CCIE_R::new(((self.bits >> (n + 1)) & 1) != 0)
522    }
523    ///Iterator for array of:
524    ///Capture/Compare (1-4) interrupt enable
525    #[inline(always)]
526    pub fn ccie_iter(&self) -> impl Iterator<Item = CCIE_R> + '_ {
527        (0..4).map(move |n| CCIE_R::new(((self.bits >> (n + 1)) & 1) != 0))
528    }
529    ///Bit 1 - Capture/Compare 1 interrupt enable
530    #[inline(always)]
531    pub fn cc1ie(&self) -> CCIE_R {
532        CCIE_R::new(((self.bits >> 1) & 1) != 0)
533    }
534    ///Bit 2 - Capture/Compare 2 interrupt enable
535    #[inline(always)]
536    pub fn cc2ie(&self) -> CCIE_R {
537        CCIE_R::new(((self.bits >> 2) & 1) != 0)
538    }
539    ///Bit 3 - Capture/Compare 3 interrupt enable
540    #[inline(always)]
541    pub fn cc3ie(&self) -> CCIE_R {
542        CCIE_R::new(((self.bits >> 3) & 1) != 0)
543    }
544    ///Bit 4 - Capture/Compare 4 interrupt enable
545    #[inline(always)]
546    pub fn cc4ie(&self) -> CCIE_R {
547        CCIE_R::new(((self.bits >> 4) & 1) != 0)
548    }
549    ///Bit 5 - COM interrupt enable
550    #[inline(always)]
551    pub fn comie(&self) -> COMIE_R {
552        COMIE_R::new(((self.bits >> 5) & 1) != 0)
553    }
554    ///Bit 6 - Trigger interrupt enable
555    #[inline(always)]
556    pub fn tie(&self) -> TIE_R {
557        TIE_R::new(((self.bits >> 6) & 1) != 0)
558    }
559    ///Bit 7 - Break interrupt enable
560    #[inline(always)]
561    pub fn bie(&self) -> BIE_R {
562        BIE_R::new(((self.bits >> 7) & 1) != 0)
563    }
564    ///Bit 8 - Update DMA request enable
565    #[inline(always)]
566    pub fn ude(&self) -> UDE_R {
567        UDE_R::new(((self.bits >> 8) & 1) != 0)
568    }
569    ///Capture/Compare (1-4) DMA request enable
570    ///
571    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1DE` field.</div>
572    #[inline(always)]
573    pub fn ccde(&self, n: u8) -> CCDE_R {
574        #[allow(clippy::no_effect)] [(); 4][n as usize];
575        CCDE_R::new(((self.bits >> (n + 9)) & 1) != 0)
576    }
577    ///Iterator for array of:
578    ///Capture/Compare (1-4) DMA request enable
579    #[inline(always)]
580    pub fn ccde_iter(&self) -> impl Iterator<Item = CCDE_R> + '_ {
581        (0..4).map(move |n| CCDE_R::new(((self.bits >> (n + 9)) & 1) != 0))
582    }
583    ///Bit 9 - Capture/Compare 1 DMA request enable
584    #[inline(always)]
585    pub fn cc1de(&self) -> CCDE_R {
586        CCDE_R::new(((self.bits >> 9) & 1) != 0)
587    }
588    ///Bit 10 - Capture/Compare 2 DMA request enable
589    #[inline(always)]
590    pub fn cc2de(&self) -> CCDE_R {
591        CCDE_R::new(((self.bits >> 10) & 1) != 0)
592    }
593    ///Bit 11 - Capture/Compare 3 DMA request enable
594    #[inline(always)]
595    pub fn cc3de(&self) -> CCDE_R {
596        CCDE_R::new(((self.bits >> 11) & 1) != 0)
597    }
598    ///Bit 12 - Capture/Compare 4 DMA request enable
599    #[inline(always)]
600    pub fn cc4de(&self) -> CCDE_R {
601        CCDE_R::new(((self.bits >> 12) & 1) != 0)
602    }
603    ///Bit 13 - COM DMA request enable
604    #[inline(always)]
605    pub fn comde(&self) -> COMDE_R {
606        COMDE_R::new(((self.bits >> 13) & 1) != 0)
607    }
608    ///Bit 14 - Trigger DMA request enable
609    #[inline(always)]
610    pub fn tde(&self) -> TDE_R {
611        TDE_R::new(((self.bits >> 14) & 1) != 0)
612    }
613}
614impl core::fmt::Debug for R {
615    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
616        f.debug_struct("DIER")
617            .field("tde", &self.tde())
618            .field("comde", &self.comde())
619            .field("cc1de", &self.cc1de())
620            .field("cc2de", &self.cc2de())
621            .field("cc3de", &self.cc3de())
622            .field("cc4de", &self.cc4de())
623            .field("ude", &self.ude())
624            .field("tie", &self.tie())
625            .field("cc1ie", &self.cc1ie())
626            .field("cc2ie", &self.cc2ie())
627            .field("cc3ie", &self.cc3ie())
628            .field("cc4ie", &self.cc4ie())
629            .field("uie", &self.uie())
630            .field("bie", &self.bie())
631            .field("comie", &self.comie())
632            .finish()
633    }
634}
635impl W {
636    ///Bit 0 - Update interrupt enable
637    #[inline(always)]
638    pub fn uie(&mut self) -> UIE_W<DIERrs> {
639        UIE_W::new(self, 0)
640    }
641    ///Capture/Compare (1-4) interrupt enable
642    ///
643    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1IE` field.</div>
644    #[inline(always)]
645    pub fn ccie(&mut self, n: u8) -> CCIE_W<DIERrs> {
646        #[allow(clippy::no_effect)] [(); 4][n as usize];
647        CCIE_W::new(self, n + 1)
648    }
649    ///Bit 1 - Capture/Compare 1 interrupt enable
650    #[inline(always)]
651    pub fn cc1ie(&mut self) -> CCIE_W<DIERrs> {
652        CCIE_W::new(self, 1)
653    }
654    ///Bit 2 - Capture/Compare 2 interrupt enable
655    #[inline(always)]
656    pub fn cc2ie(&mut self) -> CCIE_W<DIERrs> {
657        CCIE_W::new(self, 2)
658    }
659    ///Bit 3 - Capture/Compare 3 interrupt enable
660    #[inline(always)]
661    pub fn cc3ie(&mut self) -> CCIE_W<DIERrs> {
662        CCIE_W::new(self, 3)
663    }
664    ///Bit 4 - Capture/Compare 4 interrupt enable
665    #[inline(always)]
666    pub fn cc4ie(&mut self) -> CCIE_W<DIERrs> {
667        CCIE_W::new(self, 4)
668    }
669    ///Bit 5 - COM interrupt enable
670    #[inline(always)]
671    pub fn comie(&mut self) -> COMIE_W<DIERrs> {
672        COMIE_W::new(self, 5)
673    }
674    ///Bit 6 - Trigger interrupt enable
675    #[inline(always)]
676    pub fn tie(&mut self) -> TIE_W<DIERrs> {
677        TIE_W::new(self, 6)
678    }
679    ///Bit 7 - Break interrupt enable
680    #[inline(always)]
681    pub fn bie(&mut self) -> BIE_W<DIERrs> {
682        BIE_W::new(self, 7)
683    }
684    ///Bit 8 - Update DMA request enable
685    #[inline(always)]
686    pub fn ude(&mut self) -> UDE_W<DIERrs> {
687        UDE_W::new(self, 8)
688    }
689    ///Capture/Compare (1-4) DMA request enable
690    ///
691    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1DE` field.</div>
692    #[inline(always)]
693    pub fn ccde(&mut self, n: u8) -> CCDE_W<DIERrs> {
694        #[allow(clippy::no_effect)] [(); 4][n as usize];
695        CCDE_W::new(self, n + 9)
696    }
697    ///Bit 9 - Capture/Compare 1 DMA request enable
698    #[inline(always)]
699    pub fn cc1de(&mut self) -> CCDE_W<DIERrs> {
700        CCDE_W::new(self, 9)
701    }
702    ///Bit 10 - Capture/Compare 2 DMA request enable
703    #[inline(always)]
704    pub fn cc2de(&mut self) -> CCDE_W<DIERrs> {
705        CCDE_W::new(self, 10)
706    }
707    ///Bit 11 - Capture/Compare 3 DMA request enable
708    #[inline(always)]
709    pub fn cc3de(&mut self) -> CCDE_W<DIERrs> {
710        CCDE_W::new(self, 11)
711    }
712    ///Bit 12 - Capture/Compare 4 DMA request enable
713    #[inline(always)]
714    pub fn cc4de(&mut self) -> CCDE_W<DIERrs> {
715        CCDE_W::new(self, 12)
716    }
717    ///Bit 13 - COM DMA request enable
718    #[inline(always)]
719    pub fn comde(&mut self) -> COMDE_W<DIERrs> {
720        COMDE_W::new(self, 13)
721    }
722    ///Bit 14 - Trigger DMA request enable
723    #[inline(always)]
724    pub fn tde(&mut self) -> TDE_W<DIERrs> {
725        TDE_W::new(self, 14)
726    }
727}
728/**DMA/Interrupt enable register
729
730You can [`read`](crate::Reg::read) this register and get [`dier::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dier::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
731
732See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F103.html#TIM1:DIER)*/
733pub struct DIERrs;
734impl crate::RegisterSpec for DIERrs {
735    type Ux = u32;
736}
737///`read()` method returns [`dier::R`](R) reader structure
738impl crate::Readable for DIERrs {}
739///`write(|w| ..)` method takes [`dier::W`](W) writer structure
740impl crate::Writable for DIERrs {
741    type Safety = crate::Unsafe;
742}
743///`reset()` method sets DIER to value 0
744impl crate::Resettable for DIERrs {}
stm32f1_staging/stm32f103/tim1/dier.rs

stm32f1_staging/stm32f103/tim1/
dier.rs
