stm32f1_staging/stm32f103/can/
msr.rs

1///Register `MSR` reader
2pub type R = crate::R<MSRrs>;
3///Register `MSR` writer
4pub type W = crate::W<MSRrs>;
5///Field `INAK` reader - INAK
6pub type INAK_R = crate::BitReader;
7///Field `SLAK` reader - SLAK
8pub type SLAK_R = crate::BitReader;
9///Field `ERRI` reader - ERRI
10pub type ERRI_R = crate::BitReader;
11///Field `ERRI` writer - ERRI
12pub type ERRI_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `WKUI` reader - WKUI
14pub type WKUI_R = crate::BitReader;
15///Field `WKUI` writer - WKUI
16pub type WKUI_W<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `SLAKI` reader - SLAKI
18pub type SLAKI_R = crate::BitReader;
19///Field `SLAKI` writer - SLAKI
20pub type SLAKI_W<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `TXM` reader - TXM
22pub type TXM_R = crate::BitReader;
23///Field `RXM` reader - RXM
24pub type RXM_R = crate::BitReader;
25///Field `SAMP` reader - SAMP
26pub type SAMP_R = crate::BitReader;
27///Field `RX` reader - RX
28pub type RX_R = crate::BitReader;
29impl R {
30    ///Bit 0 - INAK
31    #[inline(always)]
32    pub fn inak(&self) -> INAK_R {
33        INAK_R::new((self.bits & 1) != 0)
34    }
35    ///Bit 1 - SLAK
36    #[inline(always)]
37    pub fn slak(&self) -> SLAK_R {
38        SLAK_R::new(((self.bits >> 1) & 1) != 0)
39    }
40    ///Bit 2 - ERRI
41    #[inline(always)]
42    pub fn erri(&self) -> ERRI_R {
43        ERRI_R::new(((self.bits >> 2) & 1) != 0)
44    }
45    ///Bit 3 - WKUI
46    #[inline(always)]
47    pub fn wkui(&self) -> WKUI_R {
48        WKUI_R::new(((self.bits >> 3) & 1) != 0)
49    }
50    ///Bit 4 - SLAKI
51    #[inline(always)]
52    pub fn slaki(&self) -> SLAKI_R {
53        SLAKI_R::new(((self.bits >> 4) & 1) != 0)
54    }
55    ///Bit 8 - TXM
56    #[inline(always)]
57    pub fn txm(&self) -> TXM_R {
58        TXM_R::new(((self.bits >> 8) & 1) != 0)
59    }
60    ///Bit 9 - RXM
61    #[inline(always)]
62    pub fn rxm(&self) -> RXM_R {
63        RXM_R::new(((self.bits >> 9) & 1) != 0)
64    }
65    ///Bit 10 - SAMP
66    #[inline(always)]
67    pub fn samp(&self) -> SAMP_R {
68        SAMP_R::new(((self.bits >> 10) & 1) != 0)
69    }
70    ///Bit 11 - RX
71    #[inline(always)]
72    pub fn rx(&self) -> RX_R {
73        RX_R::new(((self.bits >> 11) & 1) != 0)
74    }
75}
76impl core::fmt::Debug for R {
77    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
78        f.debug_struct("MSR")
79            .field("rx", &self.rx())
80            .field("samp", &self.samp())
81            .field("rxm", &self.rxm())
82            .field("txm", &self.txm())
83            .field("slaki", &self.slaki())
84            .field("wkui", &self.wkui())
85            .field("erri", &self.erri())
86            .field("slak", &self.slak())
87            .field("inak", &self.inak())
88            .finish()
89    }
90}
91impl W {
92    ///Bit 2 - ERRI
93    #[inline(always)]
94    pub fn erri(&mut self) -> ERRI_W<MSRrs> {
95        ERRI_W::new(self, 2)
96    }
97    ///Bit 3 - WKUI
98    #[inline(always)]
99    pub fn wkui(&mut self) -> WKUI_W<MSRrs> {
100        WKUI_W::new(self, 3)
101    }
102    ///Bit 4 - SLAKI
103    #[inline(always)]
104    pub fn slaki(&mut self) -> SLAKI_W<MSRrs> {
105        SLAKI_W::new(self, 4)
106    }
107}
108/**CAN_MSR
109
110You can [`read`](crate::Reg::read) this register and get [`msr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
111
112See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F103.html#CAN:MSR)*/
113pub struct MSRrs;
114impl crate::RegisterSpec for MSRrs {
115    type Ux = u32;
116}
117///`read()` method returns [`msr::R`](R) reader structure
118impl crate::Readable for MSRrs {}
119///`write(|w| ..)` method takes [`msr::W`](W) writer structure
120impl crate::Writable for MSRrs {
121    type Safety = crate::Unsafe;
122}
123///`reset()` method sets MSR to value 0
124impl crate::Resettable for MSRrs {}
stm32f1_staging/stm32f103/can/msr.rs

stm32f1_staging/stm32f103/can/
msr.rs
