stm32f1_staging/stm32f102/usb/
cntr.rs

1///Register `CNTR` reader
2pub type R = crate::R<CNTRrs>;
3///Register `CNTR` writer
4pub type W = crate::W<CNTRrs>;
5/**Force USB Reset
6
7Value on reset: 1*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum FRES {
11    ///0: Clear USB reset
12    NoReset = 0,
13    ///1: Force a reset of the USB peripheral, exactly like a RESET signaling on the USB
14    Reset = 1,
15}
16impl From<FRES> for bool {
17    #[inline(always)]
18    fn from(variant: FRES) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `FRES` reader - Force USB Reset
23pub type FRES_R = crate::BitReader<FRES>;
24impl FRES_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> FRES {
28        match self.bits {
29            false => FRES::NoReset,
30            true => FRES::Reset,
31        }
32    }
33    ///Clear USB reset
34    #[inline(always)]
35    pub fn is_no_reset(&self) -> bool {
36        *self == FRES::NoReset
37    }
38    ///Force a reset of the USB peripheral, exactly like a RESET signaling on the USB
39    #[inline(always)]
40    pub fn is_reset(&self) -> bool {
41        *self == FRES::Reset
42    }
43}
44///Field `FRES` writer - Force USB Reset
45pub type FRES_W<'a, REG> = crate::BitWriter<'a, REG, FRES>;
46impl<'a, REG> FRES_W<'a, REG>
47where
48    REG: crate::Writable + crate::RegisterSpec,
49{
50    ///Clear USB reset
51    #[inline(always)]
52    pub fn no_reset(self) -> &'a mut crate::W<REG> {
53        self.variant(FRES::NoReset)
54    }
55    ///Force a reset of the USB peripheral, exactly like a RESET signaling on the USB
56    #[inline(always)]
57    pub fn reset(self) -> &'a mut crate::W<REG> {
58        self.variant(FRES::Reset)
59    }
60}
61/**Power down
62
63Value on reset: 1*/
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum PDWN {
67    ///0: No power down
68    Disabled = 0,
69    ///1: Enter power down mode
70    Enabled = 1,
71}
72impl From<PDWN> for bool {
73    #[inline(always)]
74    fn from(variant: PDWN) -> Self {
75        variant as u8 != 0
76    }
77}
78///Field `PDWN` reader - Power down
79pub type PDWN_R = crate::BitReader<PDWN>;
80impl PDWN_R {
81    ///Get enumerated values variant
82    #[inline(always)]
83    pub const fn variant(&self) -> PDWN {
84        match self.bits {
85            false => PDWN::Disabled,
86            true => PDWN::Enabled,
87        }
88    }
89    ///No power down
90    #[inline(always)]
91    pub fn is_disabled(&self) -> bool {
92        *self == PDWN::Disabled
93    }
94    ///Enter power down mode
95    #[inline(always)]
96    pub fn is_enabled(&self) -> bool {
97        *self == PDWN::Enabled
98    }
99}
100///Field `PDWN` writer - Power down
101pub type PDWN_W<'a, REG> = crate::BitWriter<'a, REG, PDWN>;
102impl<'a, REG> PDWN_W<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    ///No power down
107    #[inline(always)]
108    pub fn disabled(self) -> &'a mut crate::W<REG> {
109        self.variant(PDWN::Disabled)
110    }
111    ///Enter power down mode
112    #[inline(always)]
113    pub fn enabled(self) -> &'a mut crate::W<REG> {
114        self.variant(PDWN::Enabled)
115    }
116}
117/**Low-power mode
118
119Value on reset: 0*/
120#[cfg_attr(feature = "defmt", derive(defmt::Format))]
121#[derive(Clone, Copy, Debug, PartialEq, Eq)]
122pub enum LPMODE {
123    ///0: No low-power mode
124    Disabled = 0,
125    ///1: Enter low-power mode
126    Enabled = 1,
127}
128impl From<LPMODE> for bool {
129    #[inline(always)]
130    fn from(variant: LPMODE) -> Self {
131        variant as u8 != 0
132    }
133}
134///Field `LPMODE` reader - Low-power mode
135pub type LPMODE_R = crate::BitReader<LPMODE>;
136impl LPMODE_R {
137    ///Get enumerated values variant
138    #[inline(always)]
139    pub const fn variant(&self) -> LPMODE {
140        match self.bits {
141            false => LPMODE::Disabled,
142            true => LPMODE::Enabled,
143        }
144    }
145    ///No low-power mode
146    #[inline(always)]
147    pub fn is_disabled(&self) -> bool {
148        *self == LPMODE::Disabled
149    }
150    ///Enter low-power mode
151    #[inline(always)]
152    pub fn is_enabled(&self) -> bool {
153        *self == LPMODE::Enabled
154    }
155}
156///Field `LPMODE` writer - Low-power mode
157pub type LPMODE_W<'a, REG> = crate::BitWriter<'a, REG, LPMODE>;
158impl<'a, REG> LPMODE_W<'a, REG>
159where
160    REG: crate::Writable + crate::RegisterSpec,
161{
162    ///No low-power mode
163    #[inline(always)]
164    pub fn disabled(self) -> &'a mut crate::W<REG> {
165        self.variant(LPMODE::Disabled)
166    }
167    ///Enter low-power mode
168    #[inline(always)]
169    pub fn enabled(self) -> &'a mut crate::W<REG> {
170        self.variant(LPMODE::Enabled)
171    }
172}
173/**Force suspend
174
175Value on reset: 0*/
176#[cfg_attr(feature = "defmt", derive(defmt::Format))]
177#[derive(Clone, Copy, Debug, PartialEq, Eq)]
178pub enum FSUSP {
179    ///0: No effect
180    NoEffect = 0,
181    ///1: Enter suspend mode. Clocks and static power dissipation in the analog transceiver are left unaffected
182    Suspend = 1,
183}
184impl From<FSUSP> for bool {
185    #[inline(always)]
186    fn from(variant: FSUSP) -> Self {
187        variant as u8 != 0
188    }
189}
190///Field `FSUSP` reader - Force suspend
191pub type FSUSP_R = crate::BitReader<FSUSP>;
192impl FSUSP_R {
193    ///Get enumerated values variant
194    #[inline(always)]
195    pub const fn variant(&self) -> FSUSP {
196        match self.bits {
197            false => FSUSP::NoEffect,
198            true => FSUSP::Suspend,
199        }
200    }
201    ///No effect
202    #[inline(always)]
203    pub fn is_no_effect(&self) -> bool {
204        *self == FSUSP::NoEffect
205    }
206    ///Enter suspend mode. Clocks and static power dissipation in the analog transceiver are left unaffected
207    #[inline(always)]
208    pub fn is_suspend(&self) -> bool {
209        *self == FSUSP::Suspend
210    }
211}
212///Field `FSUSP` writer - Force suspend
213pub type FSUSP_W<'a, REG> = crate::BitWriter<'a, REG, FSUSP>;
214impl<'a, REG> FSUSP_W<'a, REG>
215where
216    REG: crate::Writable + crate::RegisterSpec,
217{
218    ///No effect
219    #[inline(always)]
220    pub fn no_effect(self) -> &'a mut crate::W<REG> {
221        self.variant(FSUSP::NoEffect)
222    }
223    ///Enter suspend mode. Clocks and static power dissipation in the analog transceiver are left unaffected
224    #[inline(always)]
225    pub fn suspend(self) -> &'a mut crate::W<REG> {
226        self.variant(FSUSP::Suspend)
227    }
228}
229/**Resume request
230
231Value on reset: 0*/
232#[cfg_attr(feature = "defmt", derive(defmt::Format))]
233#[derive(Clone, Copy, Debug, PartialEq, Eq)]
234pub enum RESUME {
235    ///1: Resume requested
236    Requested = 1,
237}
238impl From<RESUME> for bool {
239    #[inline(always)]
240    fn from(variant: RESUME) -> Self {
241        variant as u8 != 0
242    }
243}
244///Field `RESUME` reader - Resume request
245pub type RESUME_R = crate::BitReader<RESUME>;
246impl RESUME_R {
247    ///Get enumerated values variant
248    #[inline(always)]
249    pub const fn variant(&self) -> Option<RESUME> {
250        match self.bits {
251            true => Some(RESUME::Requested),
252            _ => None,
253        }
254    }
255    ///Resume requested
256    #[inline(always)]
257    pub fn is_requested(&self) -> bool {
258        *self == RESUME::Requested
259    }
260}
261///Field `RESUME` writer - Resume request
262pub type RESUME_W<'a, REG> = crate::BitWriter<'a, REG, RESUME>;
263impl<'a, REG> RESUME_W<'a, REG>
264where
265    REG: crate::Writable + crate::RegisterSpec,
266{
267    ///Resume requested
268    #[inline(always)]
269    pub fn requested(self) -> &'a mut crate::W<REG> {
270        self.variant(RESUME::Requested)
271    }
272}
273/**Expected start of frame interrupt mask
274
275Value on reset: 0*/
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum ESOFM {
279    ///0: ESOF Interrupt disabled
280    Disabled = 0,
281    ///1: ESOF Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
282    Enabled = 1,
283}
284impl From<ESOFM> for bool {
285    #[inline(always)]
286    fn from(variant: ESOFM) -> Self {
287        variant as u8 != 0
288    }
289}
290///Field `ESOFM` reader - Expected start of frame interrupt mask
291pub type ESOFM_R = crate::BitReader<ESOFM>;
292impl ESOFM_R {
293    ///Get enumerated values variant
294    #[inline(always)]
295    pub const fn variant(&self) -> ESOFM {
296        match self.bits {
297            false => ESOFM::Disabled,
298            true => ESOFM::Enabled,
299        }
300    }
301    ///ESOF Interrupt disabled
302    #[inline(always)]
303    pub fn is_disabled(&self) -> bool {
304        *self == ESOFM::Disabled
305    }
306    ///ESOF Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
307    #[inline(always)]
308    pub fn is_enabled(&self) -> bool {
309        *self == ESOFM::Enabled
310    }
311}
312///Field `ESOFM` writer - Expected start of frame interrupt mask
313pub type ESOFM_W<'a, REG> = crate::BitWriter<'a, REG, ESOFM>;
314impl<'a, REG> ESOFM_W<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    ///ESOF Interrupt disabled
319    #[inline(always)]
320    pub fn disabled(self) -> &'a mut crate::W<REG> {
321        self.variant(ESOFM::Disabled)
322    }
323    ///ESOF Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
324    #[inline(always)]
325    pub fn enabled(self) -> &'a mut crate::W<REG> {
326        self.variant(ESOFM::Enabled)
327    }
328}
329/**Start of frame interrupt mask
330
331Value on reset: 0*/
332#[cfg_attr(feature = "defmt", derive(defmt::Format))]
333#[derive(Clone, Copy, Debug, PartialEq, Eq)]
334pub enum SOFM {
335    ///0: SOF Interrupt disabled
336    Disabled = 0,
337    ///1: SOF Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
338    Enabled = 1,
339}
340impl From<SOFM> for bool {
341    #[inline(always)]
342    fn from(variant: SOFM) -> Self {
343        variant as u8 != 0
344    }
345}
346///Field `SOFM` reader - Start of frame interrupt mask
347pub type SOFM_R = crate::BitReader<SOFM>;
348impl SOFM_R {
349    ///Get enumerated values variant
350    #[inline(always)]
351    pub const fn variant(&self) -> SOFM {
352        match self.bits {
353            false => SOFM::Disabled,
354            true => SOFM::Enabled,
355        }
356    }
357    ///SOF Interrupt disabled
358    #[inline(always)]
359    pub fn is_disabled(&self) -> bool {
360        *self == SOFM::Disabled
361    }
362    ///SOF Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
363    #[inline(always)]
364    pub fn is_enabled(&self) -> bool {
365        *self == SOFM::Enabled
366    }
367}
368///Field `SOFM` writer - Start of frame interrupt mask
369pub type SOFM_W<'a, REG> = crate::BitWriter<'a, REG, SOFM>;
370impl<'a, REG> SOFM_W<'a, REG>
371where
372    REG: crate::Writable + crate::RegisterSpec,
373{
374    ///SOF Interrupt disabled
375    #[inline(always)]
376    pub fn disabled(self) -> &'a mut crate::W<REG> {
377        self.variant(SOFM::Disabled)
378    }
379    ///SOF Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
380    #[inline(always)]
381    pub fn enabled(self) -> &'a mut crate::W<REG> {
382        self.variant(SOFM::Enabled)
383    }
384}
385/**USB reset interrupt mask
386
387Value on reset: 0*/
388#[cfg_attr(feature = "defmt", derive(defmt::Format))]
389#[derive(Clone, Copy, Debug, PartialEq, Eq)]
390pub enum RESETM {
391    ///0: RESET Interrupt disabled
392    Disabled = 0,
393    ///1: RESET Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
394    Enabled = 1,
395}
396impl From<RESETM> for bool {
397    #[inline(always)]
398    fn from(variant: RESETM) -> Self {
399        variant as u8 != 0
400    }
401}
402///Field `RESETM` reader - USB reset interrupt mask
403pub type RESETM_R = crate::BitReader<RESETM>;
404impl RESETM_R {
405    ///Get enumerated values variant
406    #[inline(always)]
407    pub const fn variant(&self) -> RESETM {
408        match self.bits {
409            false => RESETM::Disabled,
410            true => RESETM::Enabled,
411        }
412    }
413    ///RESET Interrupt disabled
414    #[inline(always)]
415    pub fn is_disabled(&self) -> bool {
416        *self == RESETM::Disabled
417    }
418    ///RESET Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
419    #[inline(always)]
420    pub fn is_enabled(&self) -> bool {
421        *self == RESETM::Enabled
422    }
423}
424///Field `RESETM` writer - USB reset interrupt mask
425pub type RESETM_W<'a, REG> = crate::BitWriter<'a, REG, RESETM>;
426impl<'a, REG> RESETM_W<'a, REG>
427where
428    REG: crate::Writable + crate::RegisterSpec,
429{
430    ///RESET Interrupt disabled
431    #[inline(always)]
432    pub fn disabled(self) -> &'a mut crate::W<REG> {
433        self.variant(RESETM::Disabled)
434    }
435    ///RESET Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
436    #[inline(always)]
437    pub fn enabled(self) -> &'a mut crate::W<REG> {
438        self.variant(RESETM::Enabled)
439    }
440}
441/**Suspend mode interrupt mask
442
443Value on reset: 0*/
444#[cfg_attr(feature = "defmt", derive(defmt::Format))]
445#[derive(Clone, Copy, Debug, PartialEq, Eq)]
446pub enum SUSPM {
447    ///0: Suspend Mode Request SUSP Interrupt disabled
448    Disabled = 0,
449    ///1: SUSP Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
450    Enabled = 1,
451}
452impl From<SUSPM> for bool {
453    #[inline(always)]
454    fn from(variant: SUSPM) -> Self {
455        variant as u8 != 0
456    }
457}
458///Field `SUSPM` reader - Suspend mode interrupt mask
459pub type SUSPM_R = crate::BitReader<SUSPM>;
460impl SUSPM_R {
461    ///Get enumerated values variant
462    #[inline(always)]
463    pub const fn variant(&self) -> SUSPM {
464        match self.bits {
465            false => SUSPM::Disabled,
466            true => SUSPM::Enabled,
467        }
468    }
469    ///Suspend Mode Request SUSP Interrupt disabled
470    #[inline(always)]
471    pub fn is_disabled(&self) -> bool {
472        *self == SUSPM::Disabled
473    }
474    ///SUSP Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
475    #[inline(always)]
476    pub fn is_enabled(&self) -> bool {
477        *self == SUSPM::Enabled
478    }
479}
480///Field `SUSPM` writer - Suspend mode interrupt mask
481pub type SUSPM_W<'a, REG> = crate::BitWriter<'a, REG, SUSPM>;
482impl<'a, REG> SUSPM_W<'a, REG>
483where
484    REG: crate::Writable + crate::RegisterSpec,
485{
486    ///Suspend Mode Request SUSP Interrupt disabled
487    #[inline(always)]
488    pub fn disabled(self) -> &'a mut crate::W<REG> {
489        self.variant(SUSPM::Disabled)
490    }
491    ///SUSP Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
492    #[inline(always)]
493    pub fn enabled(self) -> &'a mut crate::W<REG> {
494        self.variant(SUSPM::Enabled)
495    }
496}
497/**Wakeup interrupt mask
498
499Value on reset: 0*/
500#[cfg_attr(feature = "defmt", derive(defmt::Format))]
501#[derive(Clone, Copy, Debug, PartialEq, Eq)]
502pub enum WKUPM {
503    ///0: WKUP Interrupt disabled
504    Disabled = 0,
505    ///1: WKUP Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
506    Enabled = 1,
507}
508impl From<WKUPM> for bool {
509    #[inline(always)]
510    fn from(variant: WKUPM) -> Self {
511        variant as u8 != 0
512    }
513}
514///Field `WKUPM` reader - Wakeup interrupt mask
515pub type WKUPM_R = crate::BitReader<WKUPM>;
516impl WKUPM_R {
517    ///Get enumerated values variant
518    #[inline(always)]
519    pub const fn variant(&self) -> WKUPM {
520        match self.bits {
521            false => WKUPM::Disabled,
522            true => WKUPM::Enabled,
523        }
524    }
525    ///WKUP Interrupt disabled
526    #[inline(always)]
527    pub fn is_disabled(&self) -> bool {
528        *self == WKUPM::Disabled
529    }
530    ///WKUP Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
531    #[inline(always)]
532    pub fn is_enabled(&self) -> bool {
533        *self == WKUPM::Enabled
534    }
535}
536///Field `WKUPM` writer - Wakeup interrupt mask
537pub type WKUPM_W<'a, REG> = crate::BitWriter<'a, REG, WKUPM>;
538impl<'a, REG> WKUPM_W<'a, REG>
539where
540    REG: crate::Writable + crate::RegisterSpec,
541{
542    ///WKUP Interrupt disabled
543    #[inline(always)]
544    pub fn disabled(self) -> &'a mut crate::W<REG> {
545        self.variant(WKUPM::Disabled)
546    }
547    ///WKUP Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
548    #[inline(always)]
549    pub fn enabled(self) -> &'a mut crate::W<REG> {
550        self.variant(WKUPM::Enabled)
551    }
552}
553/**Error interrupt mask
554
555Value on reset: 0*/
556#[cfg_attr(feature = "defmt", derive(defmt::Format))]
557#[derive(Clone, Copy, Debug, PartialEq, Eq)]
558pub enum ERRM {
559    ///0: ERR Interrupt disabled
560    Disabled = 0,
561    ///1: ERR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
562    Enabled = 1,
563}
564impl From<ERRM> for bool {
565    #[inline(always)]
566    fn from(variant: ERRM) -> Self {
567        variant as u8 != 0
568    }
569}
570///Field `ERRM` reader - Error interrupt mask
571pub type ERRM_R = crate::BitReader<ERRM>;
572impl ERRM_R {
573    ///Get enumerated values variant
574    #[inline(always)]
575    pub const fn variant(&self) -> ERRM {
576        match self.bits {
577            false => ERRM::Disabled,
578            true => ERRM::Enabled,
579        }
580    }
581    ///ERR Interrupt disabled
582    #[inline(always)]
583    pub fn is_disabled(&self) -> bool {
584        *self == ERRM::Disabled
585    }
586    ///ERR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
587    #[inline(always)]
588    pub fn is_enabled(&self) -> bool {
589        *self == ERRM::Enabled
590    }
591}
592///Field `ERRM` writer - Error interrupt mask
593pub type ERRM_W<'a, REG> = crate::BitWriter<'a, REG, ERRM>;
594impl<'a, REG> ERRM_W<'a, REG>
595where
596    REG: crate::Writable + crate::RegisterSpec,
597{
598    ///ERR Interrupt disabled
599    #[inline(always)]
600    pub fn disabled(self) -> &'a mut crate::W<REG> {
601        self.variant(ERRM::Disabled)
602    }
603    ///ERR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
604    #[inline(always)]
605    pub fn enabled(self) -> &'a mut crate::W<REG> {
606        self.variant(ERRM::Enabled)
607    }
608}
609/**Packet memory area over / underrun interrupt mask
610
611Value on reset: 0*/
612#[cfg_attr(feature = "defmt", derive(defmt::Format))]
613#[derive(Clone, Copy, Debug, PartialEq, Eq)]
614pub enum PMAOVRM {
615    ///0: PMAOVR Interrupt disabled
616    Disabled = 0,
617    ///1: PMAOVR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
618    Enabled = 1,
619}
620impl From<PMAOVRM> for bool {
621    #[inline(always)]
622    fn from(variant: PMAOVRM) -> Self {
623        variant as u8 != 0
624    }
625}
626///Field `PMAOVRM` reader - Packet memory area over / underrun interrupt mask
627pub type PMAOVRM_R = crate::BitReader<PMAOVRM>;
628impl PMAOVRM_R {
629    ///Get enumerated values variant
630    #[inline(always)]
631    pub const fn variant(&self) -> PMAOVRM {
632        match self.bits {
633            false => PMAOVRM::Disabled,
634            true => PMAOVRM::Enabled,
635        }
636    }
637    ///PMAOVR Interrupt disabled
638    #[inline(always)]
639    pub fn is_disabled(&self) -> bool {
640        *self == PMAOVRM::Disabled
641    }
642    ///PMAOVR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
643    #[inline(always)]
644    pub fn is_enabled(&self) -> bool {
645        *self == PMAOVRM::Enabled
646    }
647}
648///Field `PMAOVRM` writer - Packet memory area over / underrun interrupt mask
649pub type PMAOVRM_W<'a, REG> = crate::BitWriter<'a, REG, PMAOVRM>;
650impl<'a, REG> PMAOVRM_W<'a, REG>
651where
652    REG: crate::Writable + crate::RegisterSpec,
653{
654    ///PMAOVR Interrupt disabled
655    #[inline(always)]
656    pub fn disabled(self) -> &'a mut crate::W<REG> {
657        self.variant(PMAOVRM::Disabled)
658    }
659    ///PMAOVR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
660    #[inline(always)]
661    pub fn enabled(self) -> &'a mut crate::W<REG> {
662        self.variant(PMAOVRM::Enabled)
663    }
664}
665/**Correct transfer interrupt mask
666
667Value on reset: 0*/
668#[cfg_attr(feature = "defmt", derive(defmt::Format))]
669#[derive(Clone, Copy, Debug, PartialEq, Eq)]
670pub enum CTRM {
671    ///0: Correct Transfer (CTR) Interrupt disabled
672    Disabled = 0,
673    ///1: CTR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
674    Enabled = 1,
675}
676impl From<CTRM> for bool {
677    #[inline(always)]
678    fn from(variant: CTRM) -> Self {
679        variant as u8 != 0
680    }
681}
682///Field `CTRM` reader - Correct transfer interrupt mask
683pub type CTRM_R = crate::BitReader<CTRM>;
684impl CTRM_R {
685    ///Get enumerated values variant
686    #[inline(always)]
687    pub const fn variant(&self) -> CTRM {
688        match self.bits {
689            false => CTRM::Disabled,
690            true => CTRM::Enabled,
691        }
692    }
693    ///Correct Transfer (CTR) Interrupt disabled
694    #[inline(always)]
695    pub fn is_disabled(&self) -> bool {
696        *self == CTRM::Disabled
697    }
698    ///CTR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
699    #[inline(always)]
700    pub fn is_enabled(&self) -> bool {
701        *self == CTRM::Enabled
702    }
703}
704///Field `CTRM` writer - Correct transfer interrupt mask
705pub type CTRM_W<'a, REG> = crate::BitWriter<'a, REG, CTRM>;
706impl<'a, REG> CTRM_W<'a, REG>
707where
708    REG: crate::Writable + crate::RegisterSpec,
709{
710    ///Correct Transfer (CTR) Interrupt disabled
711    #[inline(always)]
712    pub fn disabled(self) -> &'a mut crate::W<REG> {
713        self.variant(CTRM::Disabled)
714    }
715    ///CTR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set
716    #[inline(always)]
717    pub fn enabled(self) -> &'a mut crate::W<REG> {
718        self.variant(CTRM::Enabled)
719    }
720}
721impl R {
722    ///Bit 0 - Force USB Reset
723    #[inline(always)]
724    pub fn fres(&self) -> FRES_R {
725        FRES_R::new((self.bits & 1) != 0)
726    }
727    ///Bit 1 - Power down
728    #[inline(always)]
729    pub fn pdwn(&self) -> PDWN_R {
730        PDWN_R::new(((self.bits >> 1) & 1) != 0)
731    }
732    ///Bit 2 - Low-power mode
733    #[inline(always)]
734    pub fn lpmode(&self) -> LPMODE_R {
735        LPMODE_R::new(((self.bits >> 2) & 1) != 0)
736    }
737    ///Bit 3 - Force suspend
738    #[inline(always)]
739    pub fn fsusp(&self) -> FSUSP_R {
740        FSUSP_R::new(((self.bits >> 3) & 1) != 0)
741    }
742    ///Bit 4 - Resume request
743    #[inline(always)]
744    pub fn resume(&self) -> RESUME_R {
745        RESUME_R::new(((self.bits >> 4) & 1) != 0)
746    }
747    ///Bit 8 - Expected start of frame interrupt mask
748    #[inline(always)]
749    pub fn esofm(&self) -> ESOFM_R {
750        ESOFM_R::new(((self.bits >> 8) & 1) != 0)
751    }
752    ///Bit 9 - Start of frame interrupt mask
753    #[inline(always)]
754    pub fn sofm(&self) -> SOFM_R {
755        SOFM_R::new(((self.bits >> 9) & 1) != 0)
756    }
757    ///Bit 10 - USB reset interrupt mask
758    #[inline(always)]
759    pub fn resetm(&self) -> RESETM_R {
760        RESETM_R::new(((self.bits >> 10) & 1) != 0)
761    }
762    ///Bit 11 - Suspend mode interrupt mask
763    #[inline(always)]
764    pub fn suspm(&self) -> SUSPM_R {
765        SUSPM_R::new(((self.bits >> 11) & 1) != 0)
766    }
767    ///Bit 12 - Wakeup interrupt mask
768    #[inline(always)]
769    pub fn wkupm(&self) -> WKUPM_R {
770        WKUPM_R::new(((self.bits >> 12) & 1) != 0)
771    }
772    ///Bit 13 - Error interrupt mask
773    #[inline(always)]
774    pub fn errm(&self) -> ERRM_R {
775        ERRM_R::new(((self.bits >> 13) & 1) != 0)
776    }
777    ///Bit 14 - Packet memory area over / underrun interrupt mask
778    #[inline(always)]
779    pub fn pmaovrm(&self) -> PMAOVRM_R {
780        PMAOVRM_R::new(((self.bits >> 14) & 1) != 0)
781    }
782    ///Bit 15 - Correct transfer interrupt mask
783    #[inline(always)]
784    pub fn ctrm(&self) -> CTRM_R {
785        CTRM_R::new(((self.bits >> 15) & 1) != 0)
786    }
787}
788impl core::fmt::Debug for R {
789    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
790        f.debug_struct("CNTR")
791            .field("fres", &self.fres())
792            .field("pdwn", &self.pdwn())
793            .field("lpmode", &self.lpmode())
794            .field("fsusp", &self.fsusp())
795            .field("resume", &self.resume())
796            .field("esofm", &self.esofm())
797            .field("sofm", &self.sofm())
798            .field("resetm", &self.resetm())
799            .field("suspm", &self.suspm())
800            .field("wkupm", &self.wkupm())
801            .field("errm", &self.errm())
802            .field("pmaovrm", &self.pmaovrm())
803            .field("ctrm", &self.ctrm())
804            .finish()
805    }
806}
807impl W {
808    ///Bit 0 - Force USB Reset
809    #[inline(always)]
810    pub fn fres(&mut self) -> FRES_W<CNTRrs> {
811        FRES_W::new(self, 0)
812    }
813    ///Bit 1 - Power down
814    #[inline(always)]
815    pub fn pdwn(&mut self) -> PDWN_W<CNTRrs> {
816        PDWN_W::new(self, 1)
817    }
818    ///Bit 2 - Low-power mode
819    #[inline(always)]
820    pub fn lpmode(&mut self) -> LPMODE_W<CNTRrs> {
821        LPMODE_W::new(self, 2)
822    }
823    ///Bit 3 - Force suspend
824    #[inline(always)]
825    pub fn fsusp(&mut self) -> FSUSP_W<CNTRrs> {
826        FSUSP_W::new(self, 3)
827    }
828    ///Bit 4 - Resume request
829    #[inline(always)]
830    pub fn resume(&mut self) -> RESUME_W<CNTRrs> {
831        RESUME_W::new(self, 4)
832    }
833    ///Bit 8 - Expected start of frame interrupt mask
834    #[inline(always)]
835    pub fn esofm(&mut self) -> ESOFM_W<CNTRrs> {
836        ESOFM_W::new(self, 8)
837    }
838    ///Bit 9 - Start of frame interrupt mask
839    #[inline(always)]
840    pub fn sofm(&mut self) -> SOFM_W<CNTRrs> {
841        SOFM_W::new(self, 9)
842    }
843    ///Bit 10 - USB reset interrupt mask
844    #[inline(always)]
845    pub fn resetm(&mut self) -> RESETM_W<CNTRrs> {
846        RESETM_W::new(self, 10)
847    }
848    ///Bit 11 - Suspend mode interrupt mask
849    #[inline(always)]
850    pub fn suspm(&mut self) -> SUSPM_W<CNTRrs> {
851        SUSPM_W::new(self, 11)
852    }
853    ///Bit 12 - Wakeup interrupt mask
854    #[inline(always)]
855    pub fn wkupm(&mut self) -> WKUPM_W<CNTRrs> {
856        WKUPM_W::new(self, 12)
857    }
858    ///Bit 13 - Error interrupt mask
859    #[inline(always)]
860    pub fn errm(&mut self) -> ERRM_W<CNTRrs> {
861        ERRM_W::new(self, 13)
862    }
863    ///Bit 14 - Packet memory area over / underrun interrupt mask
864    #[inline(always)]
865    pub fn pmaovrm(&mut self) -> PMAOVRM_W<CNTRrs> {
866        PMAOVRM_W::new(self, 14)
867    }
868    ///Bit 15 - Correct transfer interrupt mask
869    #[inline(always)]
870    pub fn ctrm(&mut self) -> CTRM_W<CNTRrs> {
871        CTRM_W::new(self, 15)
872    }
873}
874/**control register
875
876You can [`read`](crate::Reg::read) this register and get [`cntr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cntr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
877
878See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#USB:CNTR)*/
879pub struct CNTRrs;
880impl crate::RegisterSpec for CNTRrs {
881    type Ux = u32;
882}
883///`read()` method returns [`cntr::R`](R) reader structure
884impl crate::Readable for CNTRrs {}
885///`write(|w| ..)` method takes [`cntr::W`](W) writer structure
886impl crate::Writable for CNTRrs {
887    type Safety = crate::Unsafe;
888}
889///`reset()` method sets CNTR to value 0x03
890impl crate::Resettable for CNTRrs {
891    const RESET_VALUE: u32 = 0x03;
892}
stm32f1_staging/stm32f102/usb/cntr.rs

stm32f1_staging/stm32f102/usb/
cntr.rs
