stm32f1_staging/stm32f102/uart4/
sr.rs

1///Register `SR` reader
2pub type R = crate::R<SRrs>;
3///Register `SR` writer
4pub type W = crate::W<SRrs>;
5///Framing error
6pub use crate::stm32f102::usart1::sr::FE;
7///Field `FE` reader - Framing error
8pub use crate::stm32f102::usart1::sr::FE_R;
9///IDLE line detected
10pub use crate::stm32f102::usart1::sr::IDLE;
11///Field `IDLE` reader - IDLE line detected
12pub use crate::stm32f102::usart1::sr::IDLE_R;
13///LIN break detection flag
14pub use crate::stm32f102::usart1::sr::LBDR;
15///LIN break detection flag
16pub use crate::stm32f102::usart1::sr::LBDW;
17///Field `LBD` reader - LIN break detection flag
18pub use crate::stm32f102::usart1::sr::LBD_R;
19///Field `LBD` writer - LIN break detection flag
20pub use crate::stm32f102::usart1::sr::LBD_W;
21///Noise error flag
22pub use crate::stm32f102::usart1::sr::NE;
23///Field `NE` reader - Noise error flag
24pub use crate::stm32f102::usart1::sr::NE_R;
25///Overrun error
26pub use crate::stm32f102::usart1::sr::ORE;
27///Field `ORE` reader - Overrun error
28pub use crate::stm32f102::usart1::sr::ORE_R;
29///Parity error
30pub use crate::stm32f102::usart1::sr::PE;
31///Field `PE` reader - Parity error
32pub use crate::stm32f102::usart1::sr::PE_R;
33///Read data register not empty
34pub use crate::stm32f102::usart1::sr::RXNER;
35///Read data register not empty
36pub use crate::stm32f102::usart1::sr::RXNEW;
37///Field `RXNE` reader - Read data register not empty
38pub use crate::stm32f102::usart1::sr::RXNE_R;
39///Field `RXNE` writer - Read data register not empty
40pub use crate::stm32f102::usart1::sr::RXNE_W;
41///Transmission complete
42pub use crate::stm32f102::usart1::sr::TCR;
43///Transmission complete
44pub use crate::stm32f102::usart1::sr::TCW;
45///Field `TC` reader - Transmission complete
46pub use crate::stm32f102::usart1::sr::TC_R;
47///Field `TC` writer - Transmission complete
48pub use crate::stm32f102::usart1::sr::TC_W;
49///Transmit data register empty
50pub use crate::stm32f102::usart1::sr::TXE;
51///Field `TXE` reader - Transmit data register empty
52pub use crate::stm32f102::usart1::sr::TXE_R;
53impl R {
54    ///Bit 0 - Parity error
55    #[inline(always)]
56    pub fn pe(&self) -> PE_R {
57        PE_R::new((self.bits & 1) != 0)
58    }
59    ///Bit 1 - Framing error
60    #[inline(always)]
61    pub fn fe(&self) -> FE_R {
62        FE_R::new(((self.bits >> 1) & 1) != 0)
63    }
64    ///Bit 2 - Noise error flag
65    #[inline(always)]
66    pub fn ne(&self) -> NE_R {
67        NE_R::new(((self.bits >> 2) & 1) != 0)
68    }
69    ///Bit 3 - Overrun error
70    #[inline(always)]
71    pub fn ore(&self) -> ORE_R {
72        ORE_R::new(((self.bits >> 3) & 1) != 0)
73    }
74    ///Bit 4 - IDLE line detected
75    #[inline(always)]
76    pub fn idle(&self) -> IDLE_R {
77        IDLE_R::new(((self.bits >> 4) & 1) != 0)
78    }
79    ///Bit 5 - Read data register not empty
80    #[inline(always)]
81    pub fn rxne(&self) -> RXNE_R {
82        RXNE_R::new(((self.bits >> 5) & 1) != 0)
83    }
84    ///Bit 6 - Transmission complete
85    #[inline(always)]
86    pub fn tc(&self) -> TC_R {
87        TC_R::new(((self.bits >> 6) & 1) != 0)
88    }
89    ///Bit 7 - Transmit data register empty
90    #[inline(always)]
91    pub fn txe(&self) -> TXE_R {
92        TXE_R::new(((self.bits >> 7) & 1) != 0)
93    }
94    ///Bit 8 - LIN break detection flag
95    #[inline(always)]
96    pub fn lbd(&self) -> LBD_R {
97        LBD_R::new(((self.bits >> 8) & 1) != 0)
98    }
99}
100impl core::fmt::Debug for R {
101    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
102        f.debug_struct("SR")
103            .field("pe", &self.pe())
104            .field("fe", &self.fe())
105            .field("ne", &self.ne())
106            .field("ore", &self.ore())
107            .field("idle", &self.idle())
108            .field("rxne", &self.rxne())
109            .field("tc", &self.tc())
110            .field("txe", &self.txe())
111            .field("lbd", &self.lbd())
112            .finish()
113    }
114}
115impl W {
116    ///Bit 5 - Read data register not empty
117    #[inline(always)]
118    pub fn rxne(&mut self) -> RXNE_W<SRrs> {
119        RXNE_W::new(self, 5)
120    }
121    ///Bit 6 - Transmission complete
122    #[inline(always)]
123    pub fn tc(&mut self) -> TC_W<SRrs> {
124        TC_W::new(self, 6)
125    }
126    ///Bit 8 - LIN break detection flag
127    #[inline(always)]
128    pub fn lbd(&mut self) -> LBD_W<SRrs> {
129        LBD_W::new(self, 8)
130    }
131}
132/**Status register
133
134You can [`read`](crate::Reg::read) this register and get [`sr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
135
136See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#UART4:SR)*/
137pub struct SRrs;
138impl crate::RegisterSpec for SRrs {
139    type Ux = u16;
140}
141///`read()` method returns [`sr::R`](R) reader structure
142impl crate::Readable for SRrs {}
143///`write(|w| ..)` method takes [`sr::W`](W) writer structure
144impl crate::Writable for SRrs {
145    type Safety = crate::Unsafe;
146    const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0x0160;
147}
148///`reset()` method sets SR to value 0xc0
149impl crate::Resettable for SRrs {
150    const RESET_VALUE: u16 = 0xc0;
151}
stm32f1_staging/stm32f102/uart4/sr.rs

stm32f1_staging/stm32f102/uart4/
sr.rs
