stm32f1_staging/stm32f102/uart4/
gtpr.rs

1///Register `GTPR` reader
2pub type R = crate::R<GTPRrs>;
3///Register `GTPR` writer
4pub type W = crate::W<GTPRrs>;
5///Field `PSC` reader - IrDA Low-Power pulse width peripheral clock prescaler
6pub type PSC_R = crate::FieldReader;
7///Field `PSC` writer - IrDA Low-Power pulse width peripheral clock prescaler
8pub type PSC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9impl R {
10    ///Bits 0:7 - IrDA Low-Power pulse width peripheral clock prescaler
11    #[inline(always)]
12    pub fn psc(&self) -> PSC_R {
13        PSC_R::new((self.bits & 0xff) as u8)
14    }
15}
16impl core::fmt::Debug for R {
17    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18        f.debug_struct("GTPR").field("psc", &self.psc()).finish()
19    }
20}
21impl W {
22    ///Bits 0:7 - IrDA Low-Power pulse width peripheral clock prescaler
23    #[inline(always)]
24    pub fn psc(&mut self) -> PSC_W<GTPRrs> {
25        PSC_W::new(self, 0)
26    }
27}
28/**Guard Time and Prescaler Register
29
30You can [`read`](crate::Reg::read) this register and get [`gtpr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gtpr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
31
32See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#UART4:GTPR)*/
33pub struct GTPRrs;
34impl crate::RegisterSpec for GTPRrs {
35    type Ux = u16;
36}
37///`read()` method returns [`gtpr::R`](R) reader structure
38impl crate::Readable for GTPRrs {}
39///`write(|w| ..)` method takes [`gtpr::W`](W) writer structure
40impl crate::Writable for GTPRrs {
41    type Safety = crate::Unsafe;
42}
43///`reset()` method sets GTPR to value 0
44impl crate::Resettable for GTPRrs {}