stm32f1_staging/stm32f102/spi1/
i2spr.rs

1///Register `I2SPR` reader
2pub type R = crate::R<I2SPRrs>;
3///Register `I2SPR` writer
4pub type W = crate::W<I2SPRrs>;
5///Field `I2SDIV` reader - I2S Linear prescaler
6pub type I2SDIV_R = crate::FieldReader;
7///Field `I2SDIV` writer - I2S Linear prescaler
8pub type I2SDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9///Field `ODD` reader - Odd factor for the prescaler
10pub type ODD_R = crate::BitReader;
11///Field `ODD` writer - Odd factor for the prescaler
12pub type ODD_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `MCKOE` reader - Master clock output enable
14pub type MCKOE_R = crate::BitReader;
15///Field `MCKOE` writer - Master clock output enable
16pub type MCKOE_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    ///Bits 0:7 - I2S Linear prescaler
19    #[inline(always)]
20    pub fn i2sdiv(&self) -> I2SDIV_R {
21        I2SDIV_R::new((self.bits & 0xff) as u8)
22    }
23    ///Bit 8 - Odd factor for the prescaler
24    #[inline(always)]
25    pub fn odd(&self) -> ODD_R {
26        ODD_R::new(((self.bits >> 8) & 1) != 0)
27    }
28    ///Bit 9 - Master clock output enable
29    #[inline(always)]
30    pub fn mckoe(&self) -> MCKOE_R {
31        MCKOE_R::new(((self.bits >> 9) & 1) != 0)
32    }
33}
34impl core::fmt::Debug for R {
35    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
36        f.debug_struct("I2SPR")
37            .field("mckoe", &self.mckoe())
38            .field("odd", &self.odd())
39            .field("i2sdiv", &self.i2sdiv())
40            .finish()
41    }
42}
43impl W {
44    ///Bits 0:7 - I2S Linear prescaler
45    #[inline(always)]
46    pub fn i2sdiv(&mut self) -> I2SDIV_W<I2SPRrs> {
47        I2SDIV_W::new(self, 0)
48    }
49    ///Bit 8 - Odd factor for the prescaler
50    #[inline(always)]
51    pub fn odd(&mut self) -> ODD_W<I2SPRrs> {
52        ODD_W::new(self, 8)
53    }
54    ///Bit 9 - Master clock output enable
55    #[inline(always)]
56    pub fn mckoe(&mut self) -> MCKOE_W<I2SPRrs> {
57        MCKOE_W::new(self, 9)
58    }
59}
60/**I2S prescaler register
61
62You can [`read`](crate::Reg::read) this register and get [`i2spr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2spr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
63
64See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#SPI1:I2SPR)*/
65pub struct I2SPRrs;
66impl crate::RegisterSpec for I2SPRrs {
67    type Ux = u16;
68}
69///`read()` method returns [`i2spr::R`](R) reader structure
70impl crate::Readable for I2SPRrs {}
71///`write(|w| ..)` method takes [`i2spr::W`](W) writer structure
72impl crate::Writable for I2SPRrs {
73    type Safety = crate::Unsafe;
74}
75///`reset()` method sets I2SPR to value 0x0a
76impl crate::Resettable for I2SPRrs {
77    const RESET_VALUE: u16 = 0x0a;
78}
stm32f1_staging/stm32f102/spi1/i2spr.rs

stm32f1_staging/stm32f102/spi1/
i2spr.rs
