stm32f1_staging/stm32f101/tim9/
cr2.rs

1///Register `CR2` reader
2pub type R = crate::R<CR2rs>;
3///Register `CR2` writer
4pub type W = crate::W<CR2rs>;
5///Field `MMS` reader - Master mode selection
6pub type MMS_R = crate::FieldReader;
7///Field `MMS` writer - Master mode selection
8pub type MMS_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9impl R {
10    ///Bits 4:6 - Master mode selection
11    #[inline(always)]
12    pub fn mms(&self) -> MMS_R {
13        MMS_R::new(((self.bits >> 4) & 7) as u8)
14    }
15}
16impl core::fmt::Debug for R {
17    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18        f.debug_struct("CR2").field("mms", &self.mms()).finish()
19    }
20}
21impl W {
22    ///Bits 4:6 - Master mode selection
23    #[inline(always)]
24    pub fn mms(&mut self) -> MMS_W<CR2rs> {
25        MMS_W::new(self, 4)
26    }
27}
28/**control register 2
29
30You can [`read`](crate::Reg::read) this register and get [`cr2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
31
32See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F101.html#TIM9:CR2)*/
33pub struct CR2rs;
34impl crate::RegisterSpec for CR2rs {
35    type Ux = u32;
36}
37///`read()` method returns [`cr2::R`](R) reader structure
38impl crate::Readable for CR2rs {}
39///`write(|w| ..)` method takes [`cr2::W`](W) writer structure
40impl crate::Writable for CR2rs {
41    type Safety = crate::Unsafe;
42}
43///`reset()` method sets CR2 to value 0
44impl crate::Resettable for CR2rs {}
stm32f1_staging/stm32f101/tim9/cr2.rs

stm32f1_staging/stm32f101/tim9/
cr2.rs
