stm32f1_staging/stm32f101/fsmc/
patt2.rs

1///Register `PATT2` reader
2pub type R = crate::R<PATT2rs>;
3///Register `PATT2` writer
4pub type W = crate::W<PATT2rs>;
5///Field `ATTSETx` reader - Attribute memory x setup time
6pub type ATTSETX_R = crate::FieldReader;
7///Field `ATTSETx` writer - Attribute memory x setup time
8pub type ATTSETX_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9///Field `ATTWAITx` reader - Attribute memory x wait time
10pub type ATTWAITX_R = crate::FieldReader;
11///Field `ATTWAITx` writer - Attribute memory x wait time
12pub type ATTWAITX_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13///Field `ATTHOLDx` reader - Attribute memory x hold time
14pub type ATTHOLDX_R = crate::FieldReader;
15///Field `ATTHOLDx` writer - Attribute memory x hold time
16pub type ATTHOLDX_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
17///Field `ATTHIZx` reader - Attribute memory x databus HiZ time
18pub type ATTHIZX_R = crate::FieldReader;
19///Field `ATTHIZx` writer - Attribute memory x databus HiZ time
20pub type ATTHIZX_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
21impl R {
22    ///Bits 0:7 - Attribute memory x setup time
23    #[inline(always)]
24    pub fn attsetx(&self) -> ATTSETX_R {
25        ATTSETX_R::new((self.bits & 0xff) as u8)
26    }
27    ///Bits 8:15 - Attribute memory x wait time
28    #[inline(always)]
29    pub fn attwaitx(&self) -> ATTWAITX_R {
30        ATTWAITX_R::new(((self.bits >> 8) & 0xff) as u8)
31    }
32    ///Bits 16:23 - Attribute memory x hold time
33    #[inline(always)]
34    pub fn attholdx(&self) -> ATTHOLDX_R {
35        ATTHOLDX_R::new(((self.bits >> 16) & 0xff) as u8)
36    }
37    ///Bits 24:31 - Attribute memory x databus HiZ time
38    #[inline(always)]
39    pub fn atthizx(&self) -> ATTHIZX_R {
40        ATTHIZX_R::new(((self.bits >> 24) & 0xff) as u8)
41    }
42}
43impl core::fmt::Debug for R {
44    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
45        f.debug_struct("PATT2")
46            .field("atthizx", &self.atthizx())
47            .field("attholdx", &self.attholdx())
48            .field("attwaitx", &self.attwaitx())
49            .field("attsetx", &self.attsetx())
50            .finish()
51    }
52}
53impl W {
54    ///Bits 0:7 - Attribute memory x setup time
55    #[inline(always)]
56    pub fn attsetx(&mut self) -> ATTSETX_W<PATT2rs> {
57        ATTSETX_W::new(self, 0)
58    }
59    ///Bits 8:15 - Attribute memory x wait time
60    #[inline(always)]
61    pub fn attwaitx(&mut self) -> ATTWAITX_W<PATT2rs> {
62        ATTWAITX_W::new(self, 8)
63    }
64    ///Bits 16:23 - Attribute memory x hold time
65    #[inline(always)]
66    pub fn attholdx(&mut self) -> ATTHOLDX_W<PATT2rs> {
67        ATTHOLDX_W::new(self, 16)
68    }
69    ///Bits 24:31 - Attribute memory x databus HiZ time
70    #[inline(always)]
71    pub fn atthizx(&mut self) -> ATTHIZX_W<PATT2rs> {
72        ATTHIZX_W::new(self, 24)
73    }
74}
75/**Attribute memory space timing register 2
76
77You can [`read`](crate::Reg::read) this register and get [`patt2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`patt2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
78
79See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F101.html#FSMC:PATT2)*/
80pub struct PATT2rs;
81impl crate::RegisterSpec for PATT2rs {
82    type Ux = u32;
83}
84///`read()` method returns [`patt2::R`](R) reader structure
85impl crate::Readable for PATT2rs {}
86///`write(|w| ..)` method takes [`patt2::W`](W) writer structure
87impl crate::Writable for PATT2rs {
88    type Safety = crate::Unsafe;
89}
90///`reset()` method sets PATT2 to value 0xfcfc_fcfc
91impl crate::Resettable for PATT2rs {
92    const RESET_VALUE: u32 = 0xfcfc_fcfc;
93}
stm32f1_staging/stm32f101/fsmc/patt2.rs

stm32f1_staging/stm32f101/fsmc/
patt2.rs
