stm32f1_staging/stm32f100/tim16/
sr.rs

1///Register `SR` reader
2pub type R = crate::R<SRrs>;
3///Register `SR` writer
4pub type W = crate::W<SRrs>;
5/**Update interrupt flag
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum UIFR {
11    ///0: No update occurred
12    NoUpdateOccurred = 0,
13    ///1: Update interrupt pending
14    UpdatePending = 1,
15}
16impl From<UIFR> for bool {
17    #[inline(always)]
18    fn from(variant: UIFR) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `UIF` reader - Update interrupt flag
23pub type UIF_R = crate::BitReader<UIFR>;
24impl UIF_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> UIFR {
28        match self.bits {
29            false => UIFR::NoUpdateOccurred,
30            true => UIFR::UpdatePending,
31        }
32    }
33    ///No update occurred
34    #[inline(always)]
35    pub fn is_no_update_occurred(&self) -> bool {
36        *self == UIFR::NoUpdateOccurred
37    }
38    ///Update interrupt pending
39    #[inline(always)]
40    pub fn is_update_pending(&self) -> bool {
41        *self == UIFR::UpdatePending
42    }
43}
44/**Update interrupt flag
45
46Value on reset: 0*/
47#[cfg_attr(feature = "defmt", derive(defmt::Format))]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49pub enum UIFW {
50    ///0: Clear flag
51    Clear = 0,
52}
53impl From<UIFW> for bool {
54    #[inline(always)]
55    fn from(variant: UIFW) -> Self {
56        variant as u8 != 0
57    }
58}
59///Field `UIF` writer - Update interrupt flag
60pub type UIF_W<'a, REG> = crate::BitWriter0C<'a, REG, UIFW>;
61impl<'a, REG> UIF_W<'a, REG>
62where
63    REG: crate::Writable + crate::RegisterSpec,
64{
65    ///Clear flag
66    #[inline(always)]
67    pub fn clear(self) -> &'a mut crate::W<REG> {
68        self.variant(UIFW::Clear)
69    }
70}
71/**Capture/compare %s interrupt flag
72
73Value on reset: 0*/
74#[cfg_attr(feature = "defmt", derive(defmt::Format))]
75#[derive(Clone, Copy, Debug, PartialEq, Eq)]
76pub enum CC1IFR {
77    ///0: No campture/compare has been detected
78    NoMatch = 0,
79    ///1: If CC1 is an output: The content of the counter TIMx_CNT matches the content of the TIMx_CCR1 register. If CC1 is an input: The counter value has been captured in TIMx_CCR1 register.
80    Match = 1,
81}
82impl From<CC1IFR> for bool {
83    #[inline(always)]
84    fn from(variant: CC1IFR) -> Self {
85        variant as u8 != 0
86    }
87}
88///Field `CCIF(1-1)` reader - Capture/compare %s interrupt flag
89pub type CCIF_R = crate::BitReader<CC1IFR>;
90impl CCIF_R {
91    ///Get enumerated values variant
92    #[inline(always)]
93    pub const fn variant(&self) -> CC1IFR {
94        match self.bits {
95            false => CC1IFR::NoMatch,
96            true => CC1IFR::Match,
97        }
98    }
99    ///No campture/compare has been detected
100    #[inline(always)]
101    pub fn is_no_match(&self) -> bool {
102        *self == CC1IFR::NoMatch
103    }
104    ///If CC1 is an output: The content of the counter TIMx_CNT matches the content of the TIMx_CCR1 register. If CC1 is an input: The counter value has been captured in TIMx_CCR1 register.
105    #[inline(always)]
106    pub fn is_match(&self) -> bool {
107        *self == CC1IFR::Match
108    }
109}
110/**Capture/compare %s interrupt flag
111
112Value on reset: 0*/
113#[cfg_attr(feature = "defmt", derive(defmt::Format))]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum CC1IFW {
116    ///0: Clear flag
117    Clear = 0,
118}
119impl From<CC1IFW> for bool {
120    #[inline(always)]
121    fn from(variant: CC1IFW) -> Self {
122        variant as u8 != 0
123    }
124}
125///Field `CCIF(1-1)` writer - Capture/compare %s interrupt flag
126pub type CCIF_W<'a, REG> = crate::BitWriter0C<'a, REG, CC1IFW>;
127impl<'a, REG> CCIF_W<'a, REG>
128where
129    REG: crate::Writable + crate::RegisterSpec,
130{
131    ///Clear flag
132    #[inline(always)]
133    pub fn clear(self) -> &'a mut crate::W<REG> {
134        self.variant(CC1IFW::Clear)
135    }
136}
137/**COM interrupt flag
138
139Value on reset: 0*/
140#[cfg_attr(feature = "defmt", derive(defmt::Format))]
141#[derive(Clone, Copy, Debug, PartialEq, Eq)]
142pub enum COMIFR {
143    ///0: No COM event occurred
144    NoCom = 0,
145    ///1: COM interrupt pending
146    Com = 1,
147}
148impl From<COMIFR> for bool {
149    #[inline(always)]
150    fn from(variant: COMIFR) -> Self {
151        variant as u8 != 0
152    }
153}
154///Field `COMIF` reader - COM interrupt flag
155pub type COMIF_R = crate::BitReader<COMIFR>;
156impl COMIF_R {
157    ///Get enumerated values variant
158    #[inline(always)]
159    pub const fn variant(&self) -> COMIFR {
160        match self.bits {
161            false => COMIFR::NoCom,
162            true => COMIFR::Com,
163        }
164    }
165    ///No COM event occurred
166    #[inline(always)]
167    pub fn is_no_com(&self) -> bool {
168        *self == COMIFR::NoCom
169    }
170    ///COM interrupt pending
171    #[inline(always)]
172    pub fn is_com(&self) -> bool {
173        *self == COMIFR::Com
174    }
175}
176/**COM interrupt flag
177
178Value on reset: 0*/
179#[cfg_attr(feature = "defmt", derive(defmt::Format))]
180#[derive(Clone, Copy, Debug, PartialEq, Eq)]
181pub enum COMIFW {
182    ///0: Clear flag
183    Clear = 0,
184}
185impl From<COMIFW> for bool {
186    #[inline(always)]
187    fn from(variant: COMIFW) -> Self {
188        variant as u8 != 0
189    }
190}
191///Field `COMIF` writer - COM interrupt flag
192pub type COMIF_W<'a, REG> = crate::BitWriter0C<'a, REG, COMIFW>;
193impl<'a, REG> COMIF_W<'a, REG>
194where
195    REG: crate::Writable + crate::RegisterSpec,
196{
197    ///Clear flag
198    #[inline(always)]
199    pub fn clear(self) -> &'a mut crate::W<REG> {
200        self.variant(COMIFW::Clear)
201    }
202}
203///Field `TIF` reader - Trigger interrupt flag
204pub type TIF_R = crate::BitReader;
205///Field `TIF` writer - Trigger interrupt flag
206pub type TIF_W<'a, REG> = crate::BitWriter<'a, REG>;
207/**Break interrupt flag
208
209Value on reset: 0*/
210#[cfg_attr(feature = "defmt", derive(defmt::Format))]
211#[derive(Clone, Copy, Debug, PartialEq, Eq)]
212pub enum BIFR {
213    ///0: No break event occurred
214    NoTrigger = 0,
215    ///1: An active level has been detected on the break input. An interrupt is generated if BIE=1 in the TIMx_DIER register
216    Trigger = 1,
217}
218impl From<BIFR> for bool {
219    #[inline(always)]
220    fn from(variant: BIFR) -> Self {
221        variant as u8 != 0
222    }
223}
224///Field `BIF` reader - Break interrupt flag
225pub type BIF_R = crate::BitReader<BIFR>;
226impl BIF_R {
227    ///Get enumerated values variant
228    #[inline(always)]
229    pub const fn variant(&self) -> BIFR {
230        match self.bits {
231            false => BIFR::NoTrigger,
232            true => BIFR::Trigger,
233        }
234    }
235    ///No break event occurred
236    #[inline(always)]
237    pub fn is_no_trigger(&self) -> bool {
238        *self == BIFR::NoTrigger
239    }
240    ///An active level has been detected on the break input. An interrupt is generated if BIE=1 in the TIMx_DIER register
241    #[inline(always)]
242    pub fn is_trigger(&self) -> bool {
243        *self == BIFR::Trigger
244    }
245}
246/**Break interrupt flag
247
248Value on reset: 0*/
249#[cfg_attr(feature = "defmt", derive(defmt::Format))]
250#[derive(Clone, Copy, Debug, PartialEq, Eq)]
251pub enum BIFW {
252    ///0: Clear flag
253    Clear = 0,
254}
255impl From<BIFW> for bool {
256    #[inline(always)]
257    fn from(variant: BIFW) -> Self {
258        variant as u8 != 0
259    }
260}
261///Field `BIF` writer - Break interrupt flag
262pub type BIF_W<'a, REG> = crate::BitWriter0C<'a, REG, BIFW>;
263impl<'a, REG> BIF_W<'a, REG>
264where
265    REG: crate::Writable + crate::RegisterSpec,
266{
267    ///Clear flag
268    #[inline(always)]
269    pub fn clear(self) -> &'a mut crate::W<REG> {
270        self.variant(BIFW::Clear)
271    }
272}
273/**Capture/Compare %s overcapture flag
274
275Value on reset: 0*/
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum CC1OFR {
279    ///0: No overcapture has been detected
280    NoOvercapture = 0,
281    ///1: The counter value has been captured in TIMx_CCRx register while CCxIF flag was already set
282    Overcapture = 1,
283}
284impl From<CC1OFR> for bool {
285    #[inline(always)]
286    fn from(variant: CC1OFR) -> Self {
287        variant as u8 != 0
288    }
289}
290///Field `CCOF(1-1)` reader - Capture/Compare %s overcapture flag
291pub type CCOF_R = crate::BitReader<CC1OFR>;
292impl CCOF_R {
293    ///Get enumerated values variant
294    #[inline(always)]
295    pub const fn variant(&self) -> CC1OFR {
296        match self.bits {
297            false => CC1OFR::NoOvercapture,
298            true => CC1OFR::Overcapture,
299        }
300    }
301    ///No overcapture has been detected
302    #[inline(always)]
303    pub fn is_no_overcapture(&self) -> bool {
304        *self == CC1OFR::NoOvercapture
305    }
306    ///The counter value has been captured in TIMx_CCRx register while CCxIF flag was already set
307    #[inline(always)]
308    pub fn is_overcapture(&self) -> bool {
309        *self == CC1OFR::Overcapture
310    }
311}
312/**Capture/Compare %s overcapture flag
313
314Value on reset: 0*/
315#[cfg_attr(feature = "defmt", derive(defmt::Format))]
316#[derive(Clone, Copy, Debug, PartialEq, Eq)]
317pub enum CC1OFW {
318    ///0: Clear flag
319    Clear = 0,
320}
321impl From<CC1OFW> for bool {
322    #[inline(always)]
323    fn from(variant: CC1OFW) -> Self {
324        variant as u8 != 0
325    }
326}
327///Field `CCOF(1-1)` writer - Capture/Compare %s overcapture flag
328pub type CCOF_W<'a, REG> = crate::BitWriter0C<'a, REG, CC1OFW>;
329impl<'a, REG> CCOF_W<'a, REG>
330where
331    REG: crate::Writable + crate::RegisterSpec,
332{
333    ///Clear flag
334    #[inline(always)]
335    pub fn clear(self) -> &'a mut crate::W<REG> {
336        self.variant(CC1OFW::Clear)
337    }
338}
339impl R {
340    ///Bit 0 - Update interrupt flag
341    #[inline(always)]
342    pub fn uif(&self) -> UIF_R {
343        UIF_R::new((self.bits & 1) != 0)
344    }
345    ///Capture/compare (1-1) interrupt flag
346    ///
347    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1IF` field.</div>
348    #[inline(always)]
349    pub fn ccif(&self, n: u8) -> CCIF_R {
350        #[allow(clippy::no_effect)] [(); 1][n as usize];
351        CCIF_R::new(((self.bits >> (n * 0 + 1)) & 1) != 0)
352    }
353    ///Iterator for array of:
354    ///Capture/compare (1-1) interrupt flag
355    #[inline(always)]
356    pub fn ccif_iter(&self) -> impl Iterator<Item = CCIF_R> + '_ {
357        (0..1).map(move |n| CCIF_R::new(((self.bits >> (n * 0 + 1)) & 1) != 0))
358    }
359    ///Bit 1 - Capture/compare 1 interrupt flag
360    #[inline(always)]
361    pub fn cc1if(&self) -> CCIF_R {
362        CCIF_R::new(((self.bits >> 1) & 1) != 0)
363    }
364    ///Bit 5 - COM interrupt flag
365    #[inline(always)]
366    pub fn comif(&self) -> COMIF_R {
367        COMIF_R::new(((self.bits >> 5) & 1) != 0)
368    }
369    ///Bit 6 - Trigger interrupt flag
370    #[inline(always)]
371    pub fn tif(&self) -> TIF_R {
372        TIF_R::new(((self.bits >> 6) & 1) != 0)
373    }
374    ///Bit 7 - Break interrupt flag
375    #[inline(always)]
376    pub fn bif(&self) -> BIF_R {
377        BIF_R::new(((self.bits >> 7) & 1) != 0)
378    }
379    ///Capture/Compare (1-1) overcapture flag
380    ///
381    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1OF` field.</div>
382    #[inline(always)]
383    pub fn ccof(&self, n: u8) -> CCOF_R {
384        #[allow(clippy::no_effect)] [(); 1][n as usize];
385        CCOF_R::new(((self.bits >> (n * 0 + 9)) & 1) != 0)
386    }
387    ///Iterator for array of:
388    ///Capture/Compare (1-1) overcapture flag
389    #[inline(always)]
390    pub fn ccof_iter(&self) -> impl Iterator<Item = CCOF_R> + '_ {
391        (0..1).map(move |n| CCOF_R::new(((self.bits >> (n * 0 + 9)) & 1) != 0))
392    }
393    ///Bit 9 - Capture/Compare 1 overcapture flag
394    #[inline(always)]
395    pub fn cc1of(&self) -> CCOF_R {
396        CCOF_R::new(((self.bits >> 9) & 1) != 0)
397    }
398}
399impl core::fmt::Debug for R {
400    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
401        f.debug_struct("SR")
402            .field("cc1of", &self.cc1of())
403            .field("bif", &self.bif())
404            .field("tif", &self.tif())
405            .field("comif", &self.comif())
406            .field("cc1if", &self.cc1if())
407            .field("uif", &self.uif())
408            .finish()
409    }
410}
411impl W {
412    ///Bit 0 - Update interrupt flag
413    #[inline(always)]
414    pub fn uif(&mut self) -> UIF_W<SRrs> {
415        UIF_W::new(self, 0)
416    }
417    ///Capture/compare (1-1) interrupt flag
418    ///
419    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1IF` field.</div>
420    #[inline(always)]
421    pub fn ccif(&mut self, n: u8) -> CCIF_W<SRrs> {
422        #[allow(clippy::no_effect)] [(); 1][n as usize];
423        CCIF_W::new(self, n * 0 + 1)
424    }
425    ///Bit 1 - Capture/compare 1 interrupt flag
426    #[inline(always)]
427    pub fn cc1if(&mut self) -> CCIF_W<SRrs> {
428        CCIF_W::new(self, 1)
429    }
430    ///Bit 5 - COM interrupt flag
431    #[inline(always)]
432    pub fn comif(&mut self) -> COMIF_W<SRrs> {
433        COMIF_W::new(self, 5)
434    }
435    ///Bit 6 - Trigger interrupt flag
436    #[inline(always)]
437    pub fn tif(&mut self) -> TIF_W<SRrs> {
438        TIF_W::new(self, 6)
439    }
440    ///Bit 7 - Break interrupt flag
441    #[inline(always)]
442    pub fn bif(&mut self) -> BIF_W<SRrs> {
443        BIF_W::new(self, 7)
444    }
445    ///Capture/Compare (1-1) overcapture flag
446    ///
447    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1OF` field.</div>
448    #[inline(always)]
449    pub fn ccof(&mut self, n: u8) -> CCOF_W<SRrs> {
450        #[allow(clippy::no_effect)] [(); 1][n as usize];
451        CCOF_W::new(self, n * 0 + 9)
452    }
453    ///Bit 9 - Capture/Compare 1 overcapture flag
454    #[inline(always)]
455    pub fn cc1of(&mut self) -> CCOF_W<SRrs> {
456        CCOF_W::new(self, 9)
457    }
458}
459/**status register
460
461You can [`read`](crate::Reg::read) this register and get [`sr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
462
463See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F100.html#TIM16:SR)*/
464pub struct SRrs;
465impl crate::RegisterSpec for SRrs {
466    type Ux = u32;
467}
468///`read()` method returns [`sr::R`](R) reader structure
469impl crate::Readable for SRrs {}
470///`write(|w| ..)` method takes [`sr::W`](W) writer structure
471impl crate::Writable for SRrs {
472    type Safety = crate::Unsafe;
473    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0x02a3;
474}
475///`reset()` method sets SR to value 0
476impl crate::Resettable for SRrs {}
stm32f1_staging/stm32f100/tim16/sr.rs

stm32f1_staging/stm32f100/tim16/
sr.rs
