Struct stm32f0xx_hal::pac::tim1::smcr::MSM_W

pub struct MSM_W<'a> { /* fields omitted */ }

Field MSM writer - Master/Slave mode

Implementations

impl<'a> MSM_W<'a>

pub fn variant(self, variant: MSM_A) -> &'a mut W

Writes variant to the field

pub fn no_sync(self) -> &'a mut W

No action

pub fn sync(self) -> &'a mut W

The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event.

pub fn set_bit(self) -> &'a mut W

Sets the field bit

pub fn clear_bit(self) -> &'a mut W

Clears the field bit

pub fn bit(self, value: bool) -> &'a mut W

Writes raw bits to the field